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Concept

Itanium

Related publications (23)

Nonlinear Inverse Problems in Quantitative Phase Imaging

Thanh-An Michel Pham

The topic of this thesis is the development of new algorithmic reconstruction methods for quantitative phase imaging (QPI). In the past decade, advanced QPI has emerged as a valuable tool to study label-free biological samples and uncover their 3D structur ...

EPFL2022

An Energy-Efficient Bridge-to-Digital Converter for Implantable Pressure Monitoring Systems

Marco Mattavelli, Catherine Dehollain, Franco Maloberti, Diego Ruben Barrettino, Kerim Türe, Mustafa Besirli

This paper presents an energy-efficient, duty-cycled, and spinning excitation bridge-to-digital converter (BDC) designed for implantable pressure sensing systems. The circuit provides the measure of the pulmonary artery pressure that is particularly releva ...

2022

The open EEGLAB portal Interface: High-Performance computing with EEGLAB

Fiorenzo Artoni

EEGLAB signal processing environment is currently the leading open-source software for processing electroencephalographic (EEG) data. The Neuroscience Gateway (NSG, nsgportal.org) is a web and API-based portal allowing users to easily run a variety of neur ...

2021

A massively scalable Time-to-Digital Converter with a PLL-free calibration system in a commercial 130 nm process

Edoardo Charbon

A 33.6 ps LSB Time-to-Digital converter was designed in 130 nm BiCMOS technology. The core of the converter is a differential 9-stage ring oscillator, based on a multi-path architecture. A novel version of this design is proposed, along with an analytical ...

IOP Publishing Ltd2021

Hardware-Software Co-Design of an RPC Processor

Arash Pourhabibi Zarandi

The booming popularity of online services has led to a major evolution in the way these services are built and deployed. To cope with such online data-intensive services, service providers deploy several massive-scale datacenters, also referred to as wareh ...

EPFL2021

End-to-End Industrial Study of Retiming

Giovanni De Micheli, Cunxi Yu

Sequential circuits are combinational circuits that are separated by registers. Retiming is considered as the most promising technique for optimizing sequential circuits, that involves moving the edge-triggered registers across the combinational logic with ...

IEEE2018

Methods of protein corona isolation for magnetic nanoparticles

Heinrich Hofmann, Marc Moniatte, Marijana Mionic Ebersold, Débora Bonvin, Diego Chiappe

Nanoparticles (NPs) in contact with a biological environment get covered by proteins and some are loosely bound and some are tightly bound. The latter form a hard protein corona (HPC) which is known to determine their biological behavior. Therefore, in ord ...

Royal Soc Chemistry2017

Easy and Accurate Hardware-based Program Performance Monitoring

Andrzej Pawel Nowak

The performance monitoring of computer systems is a complex affair, made even more challenging by the increasing gap between hardware and software. Methods that collect and feed data to performance analysis can usually be classified into one of two groups. ...

EPFL2017

Microarchitectural Low-Power Design Techniques for Embedded Microprocessors

Jeremy Hugues-Felix Constantin

With the omnipresence of embedded processing in all forms of electronics today, there is a strong trend towards wireless, battery-powered, portable embedded systems which have to operate under stringent energy constraints. Consequently, low power consumpti ...

EPFL2016

Automatic Generation of Efficient Accelerators for Reconfigurable Hardware

Christos Kozyrakis

Acceleration in the form of customized datapaths offer large performance and energy improvements over general purpose processors. Reconfigurable fabrics such as FPGAs are gaining popularity for use in implementing application-specific accelerators, thereby ...

Ieee2016

Eliminating unscalable communication in transaction processing

Anastasia Ailamaki, Frederick Ryan Johnson, Ippokratis Pandis

Multicore hardware demands software parallelism. Transaction processing workloads typically exhibit high concurrency, and, thus, provide ample opportunities for parallel execution. Unfortunately, because of the characteristics of the application, transacti ...

Springer Verlag2014

Methods to explore design space for MPEG RMC codec specifications

Marco Mattavelli, Endri Bezati, Simone Casale Brunet, Ghislain Roquier, Richard Thavot

The recent MPEG Reconfigurable Media Coding (RMC) standard aims at defining media processing specifications (e.g. video codecs) in a form that abstracts from the implementation platform, but at the same time is an appropriate starting point for implementat ...

Elsevier Science Bv2013

Scale-Out Processors

Pejman Lotfi Kamran

Global-scale online services, such as Google’s Web search and Facebook’s social networking, run in large-scale datacenters. Due to their massive scale, these services are designed to scale out (or distribute) their respective loads and datasets across thou ...

EPFL2013

SLICC: Self-Assembly of Instruction Cache Collectives for OLTP Workloads

Anastasia Ailamaki, Pinar Tözün

Online transaction processing (OLTP) is at the core of many data center applications. OLTP workloads are known to have large instruction footprints that foil existing L1 instruction caches resulting in poor overall performance. Prefetching can reduce the i ...

2012

Quantifying the Mismatch between Emerging Scale-Out Applications and Modern Processors

Anastasia Ailamaki, Babak Falsafi, Yusuf Onur Koçberber, Stavros Volos, Dorde Jevdic, Ilknur Cansu Kaynak, Michael Ferdman, Adrian Daniel Popescu, Al Mutaz Adileh, Mohammad Alisafaee

Emerging scale-out workloads require extensive amounts of computational resources. However, data centers using modern server hardware face physical constraints in space and power, limiting further expansion and calling for improvements in the computational ...

Association for Computing Machinery2012

Making Wide-Issue VLIW Processors Viable on FPGAs

Paolo Ienne, Madhura Purnaprajna

Soft and highly-customized processors are emerging as a common way to efficiently control large amount of computing resources available on FPGAs. Yet, some processor architectures of choice for DSP and media applications, such as wide-issue VLIW processors ...

2012

Scale-Out Processors

Babak Falsafi, Boris Robert Grot, Javier Picorel Obando, Yusuf Onur Koçberber, Stavros Volos, Dorde Jevdic, Pejman Lotfi Kamran, Michael Ferdman, Al Mutaz Adileh

Scale-out datacenters mandate high per-server throughput to get the maximum benefit from the large TCO investment. Emerging applications (e.g., data serving and web search) that run in these datacenters operate on vast datasets that are not accommodated by ...

Ieee2012

Three-dimensional harmonic holographic microcopy using nanoparticles as probes for cell imaging: erratum

Demetri Psaltis, Ye Pu, Rachel Grange, Chia-Lung Hsieh, Ye Pu

An error was made in calculating the polarization dependent second harmonic response of barium titanate nanoparticles. We have corrected the error and repeated the comparison with the experimental results. (C) 2010 Optical Society of America ...

2010

TurboTag: Lookup Filtering to Reduce Coherence Directory Power

Babak Falsafi, Michael Ferdman, Pejman Lotfi Kamran

On-chip coherence directories of today’s multi-core systems are not energy efficient. Coherence directories dissipate a significant fraction of their power on unnecessary lookups when running commercial server and scientific workloads. These workloads have ...

ACM2010

MPSoC Design using Application-Specific Architecturally Visible Communication

Edoardo Charbon, Paolo Ienne, Philip Brisk, Ties Jan Henderikus Kluter

This paper advocates the placement of Architecturally Visible Communication (AVC) buffers between adjacent cores in MPSoCs to provide high-throughput communication for streaming applications. Producer/consumer relationships map poorly onto cache-based MPSo ...

Springer-Verlag2009