Program Analysis and Compilation Techniques for Speeding up Transactional Database Workloads

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Logic rewriting is a powerful optimization technique that replaces small sections of a Boolean network with better implementations. Typically, exact synthesis is used to compute optimum replacement on-the-fly, with possible support for Boolean don't cares. ...

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Most modern in-memory online transaction processing (OLTP) engines rely on multi-version concurrency control (MVCC) to provide data consistency guarantees in the presence of conflicting data accesses. MVCC improves concurrency by generating a new version o ...

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The popular isolation level multiversion Read Committed (RC) exchanges some of the strong guarantees of serializability for increased transaction throughput. Nevertheless, transaction workloads can sometimes be executed under RC while still guaranteeing se ...

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A method for optimizing memory access for database operations is provided. The method may include performing a first database operation by at least executing a first instruction stream associated with the first database operation. The first database opera ...

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Program Analysis and Compilation Techniques for Speeding up Transactional Database Workloads

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Oligolithic Cross-task Optimizations across Isolated Workloads

Automated Formal Verification of Software Network Functions

Secure Interface Design Leveraging Hardware/Software Support

Is the powersave governor really saving power?

Decoding electroencephalographic responses to visual stimuli compatible with electrical stimulation

Scalable Logic Rewriting Using Don’t Cares

Mesh-based topology, shape and sizing optimization of ribbed plates

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

One-shot Garbage Collection for In-memory OLTP through Temporality-aware Version Storage

Efficient Concurrent Analytical Query Processing using Data and Workload-conscious Sharing

WarpAttack: Bypassing CFI through Compiler-Introduced Double-Fetches

When is it safe to run a transactional workload under Read Committed?

MOD2IR: High-Performance Code Generation for a Biophysically Detailed Neuronal Simulation DSL

Silent Bugs Matter: A Study of Compiler-Introduced Security Bugs

Determining an optimum quantity of interleaved instruction streams of defined coroutines

Cooperative Concurrency Control for Write-Intensive Key-Value Workloads

Latency Interfaces for Systems Code

Vision Transformer Adapters for Generalizable Multitask Learning

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

Analytical Engines With Context-Rich Processing: Towards Efficient Next-Generation Analytics