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PAI: A lightweight mechanism for single-node memory recovery in DSM servers

Publications associées (31)

Hardware-Software co-design Methodologies for Edge AI Optimization

ML-based edge devices may face memory and computational errors that affect applications' reliability and performance. These errors can be the result of particular working conditions (e.g., radiation areas in physical experiments or avionics) or could be th ...

EPFL2023

Method for reading and writing unreliable memories and a corresponding memory controller device and memory

Andreas Peter Burg, Reza Ghanaatian Jahromi

A method of accessing a memory space of a memory device with a decoder, the memory space having faults, including the steps of performing a memory access operation by an electronic device to a access a logical memory space of the memory device, and randomi ...

2022

In-Memory Hardware and Architectural Extensions for Workloads Acceleration

William Andrew Simon

Utilization of edge devices has exploded in the last decade, with such use cases as wearable devices, autonomous driving, and smart homes. As their ubiquity grows, so do expectations of their capabilities. Simultaneously, their formfactor and use cases lim ...

EPFL2022

HPCache: Memory-Efficient OLAP Through Proportional Caching

Anastasia Ailamaki, Periklis Chrysogelos, Hamish Mcniece Hill Nicholson

Analytical engines rely on in-memory caching to avoid disk accesses and provide timely responses by keeping the most frequently accessed data in memory. Purely frequency- & time-based caching decisions, however, are a proxy of the expected query execution ...

ACM2022

AstriFlash: A Flash-Based System for Online Services

Babak Falsafi, Mark Johnathon Sutherland, Siddharth Gupta, Lei Yan, Yunho Oh

Modern datacenters host datasets in DRAM to offer large-scale online services with tight tail-latency requirements. Unfortunately, as DRAM is expensive and increasingly difficult to scale, datacenter operators are forced to consider denser storage technolo ...

2023

Structured and tiled-based pruning of Deep Learning models targeting FPGA implementations

Alexandre Schmid, Lizeth Gonzalez Carabarin

Model compression techniques have lead to a reduction of size and number of computations of Deep Learning models. However, techniques such as pruning mostly lack of a real co-optimization with hardware platforms. For instance, implementing unstructured pru ...

IEEE2022

STEPS 4.0: Fast and memory-efficient molecular simulations of neurons at the nanoscale

Felix Schürmann, James Gonzalo King, Christos Kotsalos, Pramod Shivaji Kumbhar, Iain Hepburn, Weiliang Chen, Tristan Mathieu Carel, Samuel Marie A Melchior, Omar Awile, Baudouin Paul Michel Maria Joseph Del Marmol, Alessandro Cattabiani, Giacomo Castiglioni, Nicola Cantarutti

Recent advances in computational neuroscience have demonstrated the usefulness and importance of stochastic, spatial reaction-diffusion simulations. However, ever increasing model complexity renders traditional serial solvers, as well as naive parallel imp ...

FRONTIERS MEDIA SA2022

A Canvas for the Ethical Design of Learning Experiences with Digital Tools

Pascal Felber, Denis Gillet, Patrick Jermann, Roland John Tormey, Adrian Christian Holzer, Jessica Elke Dehler Zufferey, Cécile Hardebolle

The use of digital tools has drastically increased in engineering education, accelerated by the COVID-19 pandemic. These tools generate important ethical issues, in particular in terms of privacy and fairness. However, very few teacher training programmes ...

2022

Decentralized in-order execution of a sequential task-based code for shared-memory architectures

Charly Nicolas Lucien Castes

The hardware complexity of modern machines makes the design of adequate programming models crucial for jointly ensuring performance, portability, and productivity in high-performance computing (HPC). Sequential task-based programming models paired with adv ...

IEEE COMPUTER SOC2022

Modulation of working memory duration by synaptic and astrocytic mechanisms

Sophia Becker

Short-term synaptic plasticity and modulations of the presynaptic vesicle release rate are key components of many working memory models. At the same time, an increasing number of studies suggests a potential role of astrocytes in modulating higher cognitiv ...

PUBLIC LIBRARY SCIENCE2022

Oracular Byzantine Reliable Broadcast

Rachid Guerraoui, Matteo Monti, Manuel José Ribeiro Vidigueira, Martina Camaioni

Byzantine Reliable Broadcast (BRB) is a fundamental distributed computing primitive, with applications ranging from notifications to asynchronous payment systems. Motivated by practical consideration, we study Client-Server Byzantine Reliable Broadcast (CS ...

Schloss Dagstuhl - Leibniz-Zentrum für Informatik2022