HEAL-WEAR: an Ultra-Low Power Heterogeneous System for Bio-Signal Analysis

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Cloud computing environments increasingly provision field-programmable gate arrays (FPGAs) for their programmability and hardware-level parallelism. While FPGAs are typically used by one tenant at a time, multitenant schemes supporting spatial sharing of c ...

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Various forms of real-world data, such as social, financial, and biological networks, can be represented using graphs. An efficient method of analysing this type of data is to extract subgraph patterns, such as cliques, cycles, and motifs, from graphs. For ...

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We identified that in modern commercial FPGAs, routing signals from the general interconnect to the configurable logic blocks (CLBs) through a very sparse input interconnect block (IIB) represents a significant runtime bottleneck. This is despite academic ...

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Finding cycles in directed graphs enables important applications in various domains such as finance, biology, chemistry, and network science. However, as the size of graph datasets continues to grow, it becomes increasingly difficult to discover cycles wit ...

HEAL-WEAR: an Ultra-Low Power Heterogeneous System for Bio-Signal Analysis

Chattez avec Graph Search

Highly Parallel RTL Simulation

Exploring High-Performance and Energy-Efficient Architectures for Edge AI-Enabled Applications

EdgeAI-Aware Design of In-Memory Computing Architectures

Secure Interface Design Leveraging Hardware/Software Support

X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don’t-Care Hardware Trojans to Shared Cloud FPGAs

Oligolithic Cross-task Optimizations across Isolated Workloads

DBFS: Dynamic Bitwidth-Frequency Scaling for Efficient Software-defined SIMD

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Exploring brain-inspired multi-core heterogeneous hardware templates for low-power biomedical embedded systems

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Acceleration of Control Intensive Applications on Coarse-Grained Reconfigurable Arrays for Embedded Systems

Chaosity: Understanding Contemporary NUMA-architectures

Acceleration of graph pattern mining and applications to financial crime

Evaluating, Exploiting, and Hiding Power Side-Channel Leakage of Remote FPGAs

A Visionary Look at the Security of Reconfigurable Cloud Computing

An Open-Hardware Coarse-Grained Reconfigurable Array for Edge Computing

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

IIBLAST: Speeding Up Commercial FPGA Routing by Decoupling and Mitigating the Intra-CLB Bottleneck

Fast Parallel Algorithms for Enumeration of Simple, Temporal, and Hop-constrained Cycles

Fast Parallel Algorithms for Enumeration of Simple, Temporal, and Hop-Constrained Cycles