Punch-through impact ionization MOSFET (PIMOS): From device principle to applications

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Method for reading and writing unreliable memories and a corresponding memory controller device and memory

Andreas Peter Burg, Reza Ghanaatian Jahromi

A method of accessing a memory space of a memory device with a decoder, the memory space having faults, including the steps of performing a memory access operation by an electronic device to a access a logical memory space of the memory device, and randomi ...

2022

Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Flavio Ponzina, Marco Antonio Rios

The growing popularity of edge computing has fostered the development of diverse solutions to support Artificial Intelligence (AI) in energy-constrained devices. Nonetheless, comparatively few efforts have focused on the resiliency exhibited by AI workload ...

2022

Request, Coalesce, Serve, and Forget: Miss-Optimized Memory Systems for Bandwidth-Bound Cache-Unfriendly Applications on FPGAs

Paolo Ienne, Mikhail Asiatici

Applications such as large-scale sparse linear algebra and graph analytics are challenging to accelerate on FPGAs due to the short irregular memory accesses, resulting in low cache hit rates. Nonblocking caches reduce the bandwidth required by misses by re ...

ASSOC COMPUTING MACHINERY2022

Enhancement-mode Multi-channel AlGaN/GaN Transistors with LiNiO Junction Tri-Gate

Elison de Nazareth Matioli, Luca Nela, Taifang Wang

Multi-channel GaN power device, consisting of stacking multiple two-dimensional-electron-gas (2DEG) channels, has been demonstrated to achieve unprecedented on-state performance while maintaining high breakdown voltage (VBR). However, the large carrier den ...

Institute of Electrical and Electronics Engineers2022

Low-Power Artificial Neural Network Perceptron Based on Monolayer MoS2

Aleksandra Radenovic, Andras Kis, Zhenyu Wang, Mukesh Kumar Tripathi, Guilherme Migliato Marega

Machine learning and signal processing on the edge are poised to influence our everyday lives with devices that will learn and infer from data generated by smart sensors and other devices for the Internet of Things. The next leap toward ubiquitous electron ...

2022

STEPS 4.0: Fast and memory-efficient molecular simulations of neurons at the nanoscale

Christos Kotsalos, Tristan Mathieu Carel, Samuel Marie A Melchior, Baudouin Paul Michel Maria Joseph Del Marmol, Giacomo Castiglioni, Nicola Cantarutti, Felix Schürmann, James Gonzalo King, Pramod Shivaji Kumbhar, Omar Awile, Alessandro Cattabiani

Recent advances in computational neuroscience have demonstrated the usefulness and importance of stochastic, spatial reaction-diffusion simulations. However, ever increasing model complexity renders traditional serial solvers, as well as naive parallel imp ...

FRONTIERS MEDIA SA2022

New Technologies to Enhance the Figures-of-Merit of GaN Power Devices

Luca Nela

Gallium Nitride (GaN) has enabled groundbreaking developments in the field of optoelectronics and radio frequency communication. More recently, GaN devices for power conversion applications have demonstrated excellent potential. Thanks to Gallium Nitride w ...

EPFL2022

LiNiO Junction Gate for High-performance Enhancement-mode GaN Power Transistor

Taifang Wang

GaN metal-oxide-semiconductor high electron mobility transistors (MOS)HEMTs) offer outstanding properties for next-generation power electronics devices. The high conductivity, high voltage blocking capability, high operation frequency, and device-level int ...

EPFL2022

An Accuracy-Driven Compression Methodology to Derive Efficient Codebook-Based CNNs

David Atienza Alonso, Giovanni Ansaloni, Miguel Peon Quiros, Flavio Ponzina

Codebook-based optimizations are a class of algorithmic-level transformations able to effectively reduce the computing and memory requirements of Convolutional Neural Networks (CNNs). This approach tightly limits the number of unique weights in each layer, ...

2022

HPCache: Memory-Efficient OLAP Through Proportional Caching

Anastasia Ailamaki, Hamish Mcniece Hill Nicholson, Periklis Chrysogelos

Analytical engines rely on in-memory caching to avoid disk accesses and provide timely responses by keeping the most frequently accessed data in memory. Purely frequency- & time-based caching decisions, however, are a proxy of the expected query execution ...

ACM2022

Miss-Optimized Memory Systems: Turning Thousands of Outstanding Misses into Reuse Opportunities

Mikhail Asiatici

Even if Dennard scaling came to an end fifteen years ago, Moore' s law kept fueling an exponential growth in compute performance through increased parallelization. However, the performance of memory and, in particular, Dynamic Random Access Memory (DRAM), ...

EPFL2021

Associativity-agnostic in-cache computing memory architecture optimized for multiplication

David Atienza Alonso, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, Marco Antonio Rios

A random access memory array including a plurality of local memory group ways, each local memory group way including, a plurality of local memory groups, each local memory group including, a memory column including a plurality of memory cells, a pair of lo ...

2021