Publication

Manual Parallelization Versus State-of-the-Art Parallelization Techniques: The SPEC CPU2006 as a Case Study

Publications associées (29)

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Flavio Ponzina, Marco Antonio Rios

By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with little additional o ...

2023

Computational Imaging SPAD Cameras

Andrei Ardelean

Vision systems built around conventional image sensors have to read, encode and transmit large quantities of pixel information, a majority of which is redundant. As a result, new computational imaging sensor architectures were developed to preprocess the r ...

EPFL2023

Challenges and approaches in bridging the biomimicry gap in biohybrid systems of fish and robots

Vaios Papaspyros

As the field of ethology advances, especially over the past two decades, the role of animal-robot interaction tools has increasingly become essential. This importance arises from the need for controlled, repetitive, repeatable, and long-duration experiment ...

EPFL2023

Friction and fracture: richness and complexity in dynamic rupture

Thibault Didier Roch

Understanding how things break and slide is of paramount importance to describe the dynamics of a broad range of physical systems. This includes day-to-day problems such as the breaking of a glass of wine or the sliding of skis on snow, but also engineerin ...

EPFL2023

Fast Parallel Algorithms for Enumeration of Simple, Temporal, and Hop-Constrained Cycles

Paolo Ienne, Kubilay Atasu, Jovan Blanusa

Finding cycles in directed graphs enables important applications in various domains such as finance, biology, chemistry, and network science. However, as the size of graph datasets continues to grow, it becomes increasingly difficult to discover cycles wit ...

arXiv2023

Exploring brain-inspired multi-core heterogeneous hardware templates for low-power biomedical embedded systems

Benoît Walter Denkinger

The miniaturization of integrated circuits (ICs) and their higher performance and energy efficiency, combined with new machine learning algorithms and applications, have paved the way to intelligent, interconnected edge devices. In the medical domain, they ...

EPFL2023

A 16-bit Floating-Point Near-SRAM Architecture for Low-power Sparse Matrix-Vector Multiplication

David Atienza Alonso, Giovanni Ansaloni, Marco Antonio Rios, Grégoire Axel Eggermann

State-of-the-art Artificial Intelligence (AI) algorithms, such as graph neural networks and recommendation systems, require floating-point computation of very large matrix multiplications over sparse data. Their execution in resource-constrained scenarios, ...

New York2023

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs

Mirjana Stojilovic, Ognjen Glamocanin, Mathias Josef Payer, Shashwat Shrivastava, Jinwei Yao, Nour Ardo

Side-channel disassembly attacks recover CPU instructions from power or electromagnetic side-channel traces measured during code execution. These attacks typically rely on physical access, proximity to the victim device, and high sampling rate measuring in ...

2023

Terahertz waveform synthesis in integrated thin-film lithium niobate platform

Jérôme Faist, Ileana-Cristina Benea-Chelmus, Francesca Fabiana Settembrini

Bridging the "terahertz gap" relies upon synthesizing arbitrary waveforms in the terahertz domain enabling applications that require both narrow band sources for sensing and few-cycle drives for classical and quantum objects. However, realization of custom ...

Nature Portfolio2023