Amorphous/Crystalline Silicon Interface Passivation: Ambient-Temperature Dependence and Implications for Solar Cell Performance

Silicon heterojunction (SHJ) solar cells feature amorphous silicon passivation films, which enable very high voltages. We report how such passivation increases with operating temperature for amorphous silicon stacks involving doped layers and decreases for intrinsic-layer-only passivation. We discuss the implications of this phenomenon on the solar cell's temperature coefficient, which represents an important figure-of-merit for the energy yield of devices deployed in the field. We show evidence that both open-circuit voltage (V-oc) and fill factor (FF) are affected by these variations in passivation and quantify these temperature-mediated effects, compared with those expected from standard diode equations. We confirm that devices with high V-oc values at 25 degrees C show better high-temperature performance. However, we also argue that the precise device architecture, such as the presence of charge-transport barriers, may affect the temperature-dependent device performance as well.