Micro BTB: A High Performance and Storage Efficient Last-Level Branch Target Buffer for Servers

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Speculative execution attacks, such as Spectre, reuse code from the victim’s binary to access and leak secret information during speculative execution. Every variant of the attack requires very particular code sequences, necessitating elaborate gadget-sear ...

Micro-architectural behavior of traditional disk-based online transaction processing (OLTP) systems has been investigated extensively over the past couple of decades. Results show that traditional OLTP systems mostly under-utilize the available micro-archi ...

Large-scale online services are commonly structured as a network of software tiers, which communicate over the datacenter network using RPCs. Ongoing trends towards software decomposition have led to the prevalence of tiers receiving and generating RPCs wi ...

This work studies the class of algorithms for learning with side-information that emerges by extending generative models with embedded context-related variables. Using finite mixture models (FMMs) as the prototypical Bayesian network, we show that maximum- ...

Computer systems designers are building cache hierarchies with higher capacity to capture the ever-increasing working sets of modern workloads. Cache hierarchies with higher capacity improve system performance but shift the performance bottleneck to addres ...

Strong gravitational lensing is a powerful probe of cosmology and the dark matter distribution. Efficient lensing software is already a necessity to fully use its potential and the performance demands will only increase with the upcoming generation of tele ...

Efficient large-scale graph processing is crucial to many disciplines. Yet, while graph algorithms naturally expose massive parallelism opportunities, their performance is limited by the memory system because of irregular memory accesses. State-of-the-art ...

Hybrid caches consisting of both SRAM and emerging Non-Volatile Random Access Memory (eNVRAM) bitcells increase cache capacity and reduce power consumption by taking advantage of eNVRAM's small area footprint and low leakage energy. However, they also inhe ...

Previous research reported that corvids preferentially cache food in a location where no food will be available or cache more of a specific food in a location where this food will not be available. Here, we consider possible explanations for these prospect ...

Modern GPUs suffer from cache contention due to the limited cache size that is shared across tens of concurrently running warps. To increase the per-warp cache size prior techniques proposed warp throttling which limits the number of active warps. Warp thr ...

Micro BTB: A High Performance and Storage Efficient Last-Level Branch Target Buffer for Servers

Chattez avec Graph Search

SpecROP: Speculative Exploitation of ROP Chains

Micro-architectural analysis of in-memory OLTP: Revisited

The NEBULA RPC-Optimized Architecture

Context-Aware Learning for Generative Models

Rebooting Virtual Memory with Midgard

High Performance Computing for gravitational lens modeling: Single vs double precision on GPUs and CPUs

Large-Scale Graph Processing on FPGAs with Caches for Thousands of Simultaneous Misses

A Hybrid Cache HW/SW Stack for Optimizing Neural Network Runtime, Power and Endurance

Testing two competing hypotheses for Eurasian jays' caching for the future

Linebacker: Preserving Victim Cache Lines in Idle Register Files of GPUs