Publications associées à MIXSyn: An Efficient Logic Synthesis Methodology for Mixed XOR-AND/OR Dominated Circuits

Publications associées (32)

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Electronic devices play an irreplaceable role in our lives. With the tightening time to market, exploding demand for computing power, and continuous desire for smaller, faster, less energy-consuming, and lower-cost chips, computer-aided design for electron ...

EPFL2024

Algebraic and Boolean Methods for SFQ Superconducting Circuits

Giovanni De Micheli, Alessandro Tempia Calvino

Rapid single-flux quantum (RSFQ) is one of the most advanced and promising superconducting logic families, offering exceptional energy efficiency and speed. RSFQ technology requires delay registers (DFFs) and splitter cells to satisfy the path-balancing an ...

2024

Strain relaxation and multidentate anchoring in n-type perovskite transistors and logic circuits

Mohammad Khaja Nazeeruddin, Olga Syzgantseva

The engineering of tin halide perovskites has led to the development of p-type transistors with field-effect mobilities of over 70 cm2 V-1 s-1. However, due to their background hole doping, these perovskites are not suitable for n-type transistors. Ambipol ...

Nature Portfolio2024

Technology-Aware Logic Synthesis for Superconducting Electronics

Giovanni De Micheli, Alessandro Tempia Calvino, Siang-Yun Lee, Dewmini Sudara Marakkalage, Mingfei Yu, Rassul Bairamkulov

Superconducting electronics provide us with cryogenic digital circuits that can rival established technologies in performance and energy consumption. Today, the lack of tools for the design of large-scale integrated superconducting circuits is a major obst ...

2024

New ultrahigh-speed device concepts: from THz nanoplasma devices to glass-like electronics for neuromorphic computation

Mohammad Samizadeh Nikooytabalvandani

There is a never-ending push for electronic systems to provide faster operation speeds, higher energy efficiencies, and higher power capabilities at smaller scales. These requirements are apparent in different areas of electronics, from radiofrequency (RF) ...

EPFL2023

Improving Standard-Cell Design Flow using Factored Form Optimization

Giovanni De Micheli, Alessandro Tempia Calvino

Factored form is a powerful multi-level representation of a Boolean function that readily translates into an implementation of the function in CMOS technology. In particular, the number of literals in a factored form correlates strongly with the number of ...

IEEE2023

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

Stefan Nikolic

With Moore's law coming to an end, increasingly more hope is being put in specialized hardware implemented on reconfigurable architectures such as Field-Programmable Gate Arrays (FPGAs). Yet, it is often neglected that these architectures themselves experi ...

EPFL2023

Unraveling the Electrochemical Electrode Coupling in Integrated Organic Electrochemical Transistors

Matteo Cucchi

Organic electrochemical transistors (OECTs) have gained enormous attention due to their potential for bioelectronics and neuromorphic computing. However, their implementation into real-world applications is still impeded by a lack of understanding of the c ...

WILEY-V C H VERLAG GMBH2023

Energy-Efficient Electronic Functions Based on the Co-integration of 2D and Ferroelectric Materials

Sadegh Kamaei Bahmaei

The digital revolution has significantly transformed our world over the past decades, driven by the scaling of transistor dimensions and the exponential increase in computation power. However, as the CMOS scaling era approaches its end, the semiconductor i ...

EPFL2023

Evaluating, Exploiting, and Hiding Power Side-Channel Leakage of Remote FPGAs

Ognjen Glamocanin

The pervasive adoption of field-programmable gate arrays (FPGAs) in both cyber-physical systems and the cloud has raised many security issues. Being integrated circuits, FPGAs are susceptible to fault and power side-channel attacks, which require physical ...

EPFL2023

Technology Mapping Using Multi-output Library Cells

Giovanni De Micheli, Alessandro Tempia Calvino

Technology mapping transforms a technology-independent representation into a technology-dependent one given a library of cells. Even if technology libraries contain multi-output cells, state-of-the-art techniques fully exploit single-output cells only. Mul ...

2023

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

Guilherme Migliato Marega

Machine learning and data processing algorithms have been thriving in finding ways of processing and classifying information by exploiting the hidden trends of large datasets. Although these emerging computational methods have become successful in today's ...

EPFL2023

Active Wire Fences for Multitenant FPGAs

Mirjana Stojilovic, Ognjen Glamocanin

When spatially shared among multiple tenants, field-programmable gate arrays (FPGAs) are vulnerable to remote power side-channel analysis attacks. Using carefully crafted on-chip voltage sensors, adversaries can extract secrets (e.g., encryption keys or th ...

2023

Learning With Your PETS

Drazen Dujic, Andrea Cervone, Renan Pillon Barcelos, Jules Christian Georges Macé, Max Dupont

Recently, we published an article [1] presenting how the Power Electronics course at the bachelor level is organized by the Power Electronics Laboratory and taught at Ecole Polytechnique Fédérale de Lausanne, EPFL, Switzerland. For those avid readers who m ...

2023

A Visionary Look at the Security of Reconfigurable Cloud Computing

Francesco Regazzoni, Mirjana Stojilovic

Field-programmable gate arrays (FPGAs) have become critical components in many cloud computing platforms. These devices possess the fine-grained parallelism and specialization needed to accelerate applications ranging from machine learning to networking an ...

2023

Utilizing XMG-based Synthesis to Preserve Self-Duality for RFET-Based Circuits

Giovanni De Micheli, Heinz Riener, Alessandro Tempia Calvino, Akash Kumar

Individual transistors based on emerging reconfigurable nanotechnologies exhibit electrical conduction for both types of charge carriers. These transistors (referred to as Reconfigurable Field-Effect Transistors (RFETs)) enable dynamic reconfiguration to d ...

2022

Exploring negative capacitance and neuromorphic devices based on CMOS-compatible ferroelectric HfO2

Carlotta Gastaldi

Ferroelectric materials are explored for numerous applications thanks to their properties associated with electrically switchable spontaneous polarization. Perovskites are an established class of ferroelectrics used for sensors and actuators. However, they ...

EPFL2022

Logic Synthesis From Incomplete Specifications Using Disjoint Support Decomposition

Giovanni De Micheli, Andrea Costamagna

Approximate logic synthesis is an emerging field that tolerates errors in the synthesized logic circuits for better optimization quality. Indeed, in many computing problems, the requirement of preserving the exact functionality either results in unnecessar ...

IEEE2022

An All-Digital 1 Mbps, 57 pJ/bit Bluetooth Low Energy (BLE) Backscatter ASIC in 65 nm CMOS

James Daniel Rosenthal

We present an all-digital application specific integrated circuit (ASIC) that implements Bluetooth Low Energy (BLE)-compatible backscatter communication. The ASIC was fabricated in a 65 nm CMOS process and occupies an active area of 0.12 mm(2) while consum ...

IEEE2022

Electronic transport in graphene nanoribbon junctions

Kristians Cernevics

Graphene nanoribbons (GNRs) - one-dimensional strips of graphene - share many of the exciting properties of graphene, such as ballistic transport over micron dimensions, strength and flexibility, but more importantly, they exhibit a tunable band gap that d ...

EPFL2022