Publication

From basic concept to real-time implementation: Prototyping WCDMA downlink receiver algorithms - A case study

2000
Conference Papers

Résumé

In this paper we present an approach to rapid prototyping of advanced signal processing techniques for future wireless applications currently being adopted within Bell Labs Research. The aim of the "Bell Labs Algorithm Development and Evaluation " (BLADE) initiative is to devise a design framework specifically targeting the needs land capabilities) of high-level algorithm designers (viz. communication engineers), which enables them to quickly, "translate" a research idea into a working real-time system for practical experimentation purposes. The mixed DSP/FPGA implementation of a WCDMA testbed is used as an example to describe our initial experience with the proposed design methodology, which is based on a set of commercially available software tools and a platform consisting of off the shelf hardware modules.

Source officielle

https://infoscience.epfl.ch/entities/publication/b9d2d3fd-f7bc-4521-8be9-f2a9a305ad0f

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2000
Conference Papers

Résumé

Source officielle

https://infoscience.epfl.ch/entities/publication/b9d2d3fd-f7bc-4521-8be9-f2a9a305ad0f

À propos de ce résultat

Concepts associés (32)

High-level synthesis

High-level synthesis (HLS), sometimes referred to as C synthesis, electronic system-level (ESL) synthesis, algorithmic synthesis, or behavioral synthesis, is an automated design process that takes an abstract behavioral specification of a digital system and finds a register-transfer level structure that realizes the given behavior. Synthesis begins with a high-level specification of the problem, where behavior is generally decoupled from low-level circuit mechanics such as clock-level timing.

Electronic system-level design and verification

Electronic system level (ESL) design and verification is an electronic design methodology, focused on higher abstraction level concerns. The term Electronic System Level or ESL Design was first defined by Gartner Dataquest, an EDA-industry-analysis firm, on February 1, 2001. It is defined in ESL Design and Verification as: "the utilization of appropriate abstractions in order to increase comprehension about a system, and to enhance the probability of a successful implementation of functionality in a cost-effective manner.

Field-programmable gate array

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured after manufacturing. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools. FPGAs contain an array of programmable logic blocks, and a hierarchy of reconfigurable interconnects allowing blocks to be wired together.

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Publications associées (3)

From basic concept to real-time implementation: Prototyping WCDMA downlink receiver algorithms - A case study

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