Execution Trace Graph Based Multi-criteria Partitioning of Stream Programs

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Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

The invention relates to an Imaging sensor device in a stacked arrangement comprising: - a pixel array tier comprising a plurality of pixel segments each having a plurality of pixels for photon detection each providing a digital pixel output; - a processin ...

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

Machine learning algorithms such as Convolutional Neural Networks (CNNs) are characterized by high robustness towards quantization, supporting small-bitwidth fixed-point arithmetic at inference time with little to no degradation in accuracy. In turn, small ...

Detecting digital face manipulation in images and video has attracted extensive attention due to the potential risk to public trust. To counteract the malicious usage of such techniques, deep learning-based deepfake detection methods have been employed and ...

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

Due to its high parallelism, belief propagation (BP)decoding is amenable to high-throughput applications and thusrepresents a promising solution for the ultra-high peak datarate required by future communication systems. To bridge theperformance gap compare ...

Cloud computing environments increasingly provision field-programmable gate arrays (FPGAs) for their programmability and hardware-level parallelism. While FPGAs are typically used by one tenant at a time, multitenant schemes supporting spatial sharing of c ...

Coarse-Grain Reconfigurable Arrays (CGRAs) represent emerging low-power architectures designed to accelerate Compute-Intensive Loops (CILs). The effectiveness of CGRAs in providing acceleration relies on the quality of mapping: how efficiently the CIL is c ...

The desire and ability to place AI-enabled applications on the edge has grown significantly in recent years. However, the compute-, area-, and power-constrained nature of edge devices are stressed by the needs of the AI-enabled applications, due to a gener ...

Dataflow programming is a methodology that enables the development of high-level, parametric programs that are independent of the underlying platform. This approach is particularly useful for heterogeneous platforms, as it eliminates the need to rewrite ap ...

Today's continued increase in demand for processing power, despite the slowdown of Moore's law, has led to an increase in processor count, which has resulted in energy consumption and distribution problems. To address this, there is a growing trend toward ...

Acoustic emission (AE) monitoring is a useful technique to monitor the health of a structure continuously, helping to prevent potential failure. AE are elastic waves produced and emitted during fracture processes inside a material and are recorded by senso ...

Acoustic emission (AE) monitoring is commonly used to inspect the health of a structure continuously. During fracture processes elastic waves of AE are created and emitted, and sensors can capture these waves. The acquired signals can be processed to track ...

The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators. Specialized hardware has already redefine ...

Modern data management systems aim to provide both cutting-edge functionality and hardware efficiency. With the advent of AI-driven data processing and the post-Moore Law era, traditional memory-bound scale-up data management operations face scalability ch ...

Embedded systems confront two opposite goals: low-power operation and high performance. The current trend to reach these goals is toward heterogeneous platforms, including multi-core architectures with heterogeneous cores and hardware accelerators. The lat ...

The detection of digital face manipulation in video has attracted extensive attention due to the increased risk to public trust. To counteract the malicious usage of such techniques, deep learning-based deepfake detection methods have been developed and ha ...

Cycles are one of the fundamental subgraph patterns and being able to enumerate them in graphs enables important applications in a wide variety of fields, including finance, biology, chemistry, and network science. However, to enable cycle enumeration in r ...

Finding cycles in directed graphs enables important applications in various domains such as finance, biology, chemistry, and network science. However, as the size of graph datasets continues to grow, it becomes increasingly difficult to discover cycles wit ...

Execution Trace Graph Based Multi-criteria Partitioning of Stream Programs

Chattez avec Graph Search

Highly Parallel RTL Simulation

Imaging sensor device using an array of single-photon avalanche diode photodetectors

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

DBFS: Dynamic Bitwidth-Frequency Scaling for Efficient Software-defined SIMD

Assessment framework for deepfake detection in real-world situations

EdgeAI-Aware Design of In-Memory Computing Architectures

High-Throughput and Flexible Belief Propagation List Decoder for Polar Codes

X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don’t-Care Hardware Trojans to Shared Cloud FPGAs

SAT-based Exact Modulo Scheduling Mapping for Resource-Constrained CGRAs

Exploring High-Performance and Energy-Efficient Architectures for Edge AI-Enabled Applications

Design Space Exploration for Partitioning Dataflow Program on CPU-GPU Heterogeneous System

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

Automatic and high-precision acoustic emission-based structural health monitoring of concrete structures

Automatic and high-precision microseismic monitoring of progressive failure prior, during, and after tunnel excavation

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Post-Moore's Law Fusion: High-Bandwidth Memory, Accelerators, and Native Half-Precision Processing for CPU-Local Analytics

Acceleration of Control Intensive Applications on Coarse-Grained Reconfigurable Arrays for Embedded Systems

Impact of Video Processing Operations in Deepfake Detection

Fast Parallel Algorithms for Enumeration of Simple, Temporal, and Hop-constrained Cycles

Fast Parallel Algorithms for Enumeration of Simple, Temporal, and Hop-Constrained Cycles