Timing-Driven Placement for FPGA Architectures with Dedicated Routing Paths

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Solving optimization problems is a key task for which quantum computers could possibly provide a speedup over the best known classical algorithms. Particular classes of optimization problems including semidefinite programming (SDP) and linear programming ( ...

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Logic Synthesis From Partial Specifications (LSFPS) is the problem of finding the hardware implementation of a Boolean function from a partial knowledge of its care set. The elements missing from the specifications are named don't knows. The exact solution ...

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Cloud computing environments increasingly provision FPGAs because of their fine-grained, highly parallel, and flexible hardware architecture. The availability of FPGAs in the cloud fueled research on the security risks associated with exposing FPGA fabric ...

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The pervasive adoption of field-programmable gate arrays (FPGAs) in both cyber-physical systems and the cloud has raised many security issues. Being integrated circuits, FPGAs are susceptible to fault and power side-channel attacks, which require physical ...

Field-programmable gate arrays (FPGAs) have become critical components in many cloud computing platforms. These devices possess the fine-grained parallelism and specialization needed to accelerate applications ranging from machine learning to networking an ...

Prequalified beam-to-column connections in steel moment resisting frames usually concentrate inelastic deformations in the steel beam ends. As such, nonlinear geo-metric instabilities (i.e., local buckling) may occur in these regions at modest lateral drif ...

With Moore's law coming to an end, increasingly more hope is being put in specialized hardware implemented on reconfigurable architectures such as Field-Programmable Gate Arrays (FPGAs). Yet, it is often neglected that these architectures themselves experi ...

In this work, we develop timing-driven CAD support for FPGA architectures with direct connections between LUTs. We do so by proposing an efficient ILP-based detailed placer, which moves a carefully selected subset of LUTs from their original positions, so ...

Distributed energy resources (DERs) installed in active distribution networks (ADNs) can be exploited to provide both active and reactive power reserves to the upper-layer grid (i.e., sub-transmission and transmission systems) at their connection point. Th ...

Novel applications have triggered significant changes at the system level of FPGA architecture design, such as the introduction of embedded VLIW processor arrays and hardened NoCs. However, the routing architecture of the soft logic fabric has largely rema ...

The Abstraction is at the heart of sketching due to the simple and minimal nature of line drawings. Abstraction entails identifying the essential visual properties of an object or scene, which requires semantic understanding and prior knowledge of high-lev ...

Timing-Driven Placement for FPGA Architectures with Dedicated Routing Paths

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Slack-variable Approach for Variational Quantum Semidefinite Programming

Shear and steel-fibre reinforcement for the punching resistance of flat slabs at internal and edge columns

Auction algorithm sensitivity for multi-robot task allocation

Carbonized wood impregnated with bimetallic nanoparticles as a monolithic continuous-flow microreactor for the reduction of 4-nitrophenol

How roughness emerges on natural and engineered surfaces

Finding Nash equilibrium based on reinforcement learning for bidding strategy and distributed algorithm for ISO in imperfect electricity market

Accuracy recovery: A decomposition procedure for the synthesis of partially-specified Boolean functions

A mathematical model that integrates cardiac electrophysiology, mechanics, and fluid dynamics: Application to the human left heart

Caching and Neutrality

Practical Implementations of Remote Power Side-Channel and Fault-Injection Attacks on Multitenant FPGAs

Diffusion of energy technologies: the role and dynamics of supply-side information networks

Evaluating, Exploiting, and Hiding Power Side-Channel Leakage of Remote FPGAs

A Visionary Look at the Security of Reconfigurable Cloud Computing

Geometric tolerances of welded connections with inelastic panel zones

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

Detailed Placement for Dedicated LUT-Level FPGA Interconnect

Characterizing the Reserve Provision Capability Area of Active Distribution Networks: A Linear Robust Optimization Method

NetCracker: A Peek into the Routing Architecture of Xilinx 7-Series FPGAs

MPEG-G Reference-Based Compression of Unaligned Reads Through Ultra-Fast Alignments

CLIPasso: Semantically-Aware Object Sketching