Publication

Design and Optimization of Operational Amplifiers for SC Systems - a Comparative Study in CMOS 0.8 μm, 0.35 μm, 0.18 μm Technologies

Publications associées (32)

New Technologies to Enhance the Figures-of-Merit of GaN Power Devices

Gallium Nitride (GaN) has enabled groundbreaking developments in the field of optoelectronics and radio frequency communication. More recently, GaN devices for power conversion applications have demonstrated excellent potential. Thanks to Gallium Nitride w ...

EPFL2022

Exploring negative capacitance and neuromorphic devices based on CMOS-compatible ferroelectric HfO2

Carlotta Gastaldi

Ferroelectric materials are explored for numerous applications thanks to their properties associated with electrically switchable spontaneous polarization. Perovskites are an established class of ferroelectrics used for sensors and actuators. However, they ...

EPFL2022

Thermal and Power-Aware Run-Time Performance Management of 3D MPSoCs with Integrated Flow Cell Arrays

David Atienza Alonso, Halima Najibi, Giovanni Ansaloni, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse

Flow Cell Arrays (FCA) technology employs microchannels filled with an electrolytic fluid to concurrently provide cooling and power generation to integrated circuits (ICs). This solution is particularly appealing for Three-Dimensional Multi-Processor Syste ...

2022

Enhancement-mode Multi-channel AlGaN/GaN Transistors with LiNiO Junction Tri-Gate

Elison de Nazareth Matioli, Taifang Wang, Luca Nela

Multi-channel GaN power device, consisting of stacking multiple two-dimensional-electron-gas (2DEG) channels, has been demonstrated to achieve unprecedented on-state performance while maintaining high breakdown voltage (VBR). However, the large carrier den ...

Institute of Electrical and Electronics Engineers2022

SEKV-E: Parameter Extractor of Simplified EKV I-V Model for Low-Power Analog Circuits

Christian Enz, Hung-Chi Han, Antonio D'Amico

This paper presents the open-source Python-based parameter extractor (SEKV-E) for the simplified EKV (sEKV) model, which enables the modern low-power circuit designs with the inversion coefficient design methodology. The tool extracts the essential sEKV pa ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

A 500 x 500 Dual-Gate SPAD Imager With 100% Temporal Aperture and 1 ns Minimum Gate Length for FLIM and Phasor Imaging Applications

Claudio Bruschini, Edoardo Charbon, Arin Can Ülkü, Andrei Ardelean, Paul Mos, Michael Alan Wayne

In this article, we report on SwissSPAD3 (SS3), a 500 x 500 pixel single-photon avalanche diode (SPAD) array, fabricated in 0.18-mu m CMOS technology. In this sensor, we introduce a novel dual-gate architecture with two contiguous temporal windows, or gate ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Comparison of Two in Pixel Source Follower Schemes for Deep Subelectron Noise CMOS Image Sensors

Christian Enz, Minhao Yang, Assim Boukhayma, Antonino Caizzone, Daniel Mathias Bold, Andrea Kraxner

This paper compares two in-pixel source follower stage designs for low noise CMOS image sensors embedded both on a same 5 mm by 5 mm chip fabricated in a 180 nm CIS process. The presented chip embeds two pixel variants, one based on a body-effect-canceled ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Hard and Soft Switching Losses in Power Converters: Role of Transistor Output Capacitance

Palliyage Srilak Nirmana Perera

To best utilize power converters, a sound understanding of the relationship between the circuit topology and the power-semiconductor-device characteristics is required. This is especially important in high-frequency switching, where device parasitics start ...

EPFL2022

An All-Digital 1 Mbps, 57 pJ/bit Bluetooth Low Energy (BLE) Backscatter ASIC in 65 nm CMOS

James Daniel Rosenthal

We present an all-digital application specific integrated circuit (ASIC) that implements Bluetooth Low Energy (BLE)-compatible backscatter communication. The ASIC was fabricated in a 65 nm CMOS process and occupies an active area of 0.12 mm(2) while consum ...

IEEE2022

A Cryo-CMOS Wideband Quadrature Receiver With Frequency Synthesizer for Scalable Multiplexed Readout of Silicon Spin Qubits

Edoardo Charbon, Andrea Ruffino, Yatao Peng

In this article, a cryo-CMOS receiver integrated with a frequency synthesizer for scalable multiplexed readout of qubits is presented, focusing on radio frequency (RF) reflectometry readout of silicon-based semiconductor spin qubits/quantum dots. The propo ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Blumino: The First Fully Integrated Analog SiPM With On-Chip Time Conversion

Edoardo Charbon, Andrei Ardelean, Andrada Alexandra Muntean, Esteban Venialgo Araujo, Emanuele Ripiccini

Blumino is the first analog silicon photomultiplier with integrated amplifier, comparator and time-to-digital converter (TDC). The combination of a photodetector together with on-chip readout circuitry enables system-level advantages, such as internal para ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Intrinsic switching in Si-doped HfO2: A study of Curie-Weiss law and its implications for negative capacitance field-effect transistor

Igor Stolichnov, Mihai Adrian Ionescu, Teodor Rosca, Ali Saeidi, Matteo Cavalieri, Eamon Patrick O'Connor, Carlotta Gastaldi, Sadegh Kamaei Bahmaei

HfO2-based ferroelectrics are considered a promising class of materials for logic and memory applications due to their CMOS compatibility and ferroelectric figures of merit. A steep-slope field-effect-transistor (FET) switch is a device for logic applicati ...

AMER INST PHYSICS2021