Publications associées à Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

Publications associées (32)

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Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

EPFL2024

EdgeAI-Aware Design of In-Memory Computing Architectures

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Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

EPFL2024

Exploring High-Performance and Energy-Efficient Architectures for Edge AI-Enabled Applications

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The desire and ability to place AI-enabled applications on the edge has grown significantly in recent years. However, the compute-, area-, and power-constrained nature of edge devices are stressed by the needs of the AI-enabled applications, due to a gener ...

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The increasing demand for computing power and the emergence of heterogeneous computing architectures have driven the exploration of innovative techniques to address current limitations in both the compute and memory subsystems. One such solution is the use ...

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DBFS: Dynamic Bitwidth-Frequency Scaling for Efficient Software-defined SIMD

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Machine learning algorithms such as Convolutional Neural Networks (CNNs) are characterized by high robustness towards quantization, supporting small-bitwidth fixed-point arithmetic at inference time with little to no degradation in accuracy. In turn, small ...

IEEE2024

Imaging sensor device using an array of single-photon avalanche diode photodetectors

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The invention relates to an Imaging sensor device in a stacked arrangement comprising: - a pixel array tier comprising a plurality of pixel segments each having a plurality of pixels for photon detection each providing a digital pixel output; - a processin ...

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Assessment framework for deepfake detection in real-world situations

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Detecting digital face manipulation in images and video has attracted extensive attention due to the potential risk to public trust. To counteract the malicious usage of such techniques, deep learning-based deepfake detection methods have been employed and ...

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Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

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The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

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Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism

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Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher pow ...

MDPI2024

Oligolithic Cross-task Optimizations across Isolated Workloads

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Enterprises collect data in large volumes and leverage them to drive numerous concurrent decisions and business processes. Their teams deploy multiple applications that often operate concurrently on the same data and infrastructure but have widely differen ...

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The 2024 Magnonics Roadmap

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Magnonics is a research field that has gained an increasing interest in both the fundamental and applied sciences in recent years. This field aims to explore and functionalize collective spin excitations in magnetically ordered materials for modern informa ...

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Secure Interface Design Leveraging Hardware/Software Support

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Computer systems rely heavily on abstraction to manage the exponential growth of complexity across hardware and software. Due to practical considerations of compatibility between components of these complex systems across generations, developers have favou ...

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Scalable Logic Rewriting Using Don’t Cares

Giovanni De Micheli, Alessandro Tempia Calvino

Logic rewriting is a powerful optimization technique that replaces small sections of a Boolean network with better implementations. Typically, exact synthesis is used to compute optimum replacement on-the-fly, with possible support for Boolean don't cares. ...

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SAT-based Exact Modulo Scheduling Mapping for Resource-Constrained CGRAs

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Coarse-Grain Reconfigurable Arrays (CGRAs) represent emerging low-power architectures designed to accelerate Compute-Intensive Loops (CILs). The effectiveness of CGRAs in providing acceleration relies on the quality of mapping: how efficiently the CIL is c ...

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Generative AI-Enabled Conversational Interaction to Support Self-Directed Learning Experiences in Transversal Computational Thinking

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As computational thinking (CT) becomes increasingly acknowledged as an important skill in education, self-directed learning (SDL) emerges as a key strategy for developing this capability. The advent of generative AI (GenAI) conversational agents has disrup ...

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Efficient Operational Analytics on Fresh Data

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Operational analytics enables real-time data analysis for actionable insights on operational data through hybrid transaction and analytical processing (HTAP). HTAP focuses on analytical data freshness, that is, query processing on fresh data generated by c ...

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Lithium tantalate photonic integrated circuits for volume manufacturing

Tobias Kippenberg, Johann Emmeram Riemensberger, Mikhail Churaev, Xinru Ji, Zihan Li, Terence Albert Emile Blésin, Chengli Wang, Junyin Zhang, Xi Wang, Chen Yang, Wil Kao, Alisa Davydova

Electro-optical photonic integrated circuits (PICs) based on lithium niobate (LiNbO3) have demonstrated the vast capabilities of materials with a high Pockels coefficient1,2. They enable linear and high-speed modulators operating at complementary metal–oxi ...

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Dissipative Kerr soliton generation at 2μm in a silicon nitride microresonator

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Chip -scale optical frequency combs enable the generation of highly -coherent pulsed light at gigahertz-level repetition rates, with potential technological impact ranging from telecommunications to sensing and spectroscopy. In combination with techniques ...

Optica Publishing Group2024

Automated Formal Verification of Software Network Functions

Solal Vincenzo Pirelli

Formally verifying the correctness of software is necessary to merit the trust people put in software systems. Currently, formal verification requires human effort to prove that a piece of code matches its specification and code changes to improve verifiab ...

EPFL2024

Design Space Exploration for Partitioning Dataflow Program on CPU-GPU Heterogeneous System

Marco Mattavelli, Simone Casale Brunet, Aurélien François Gilbert Bloch

Dataflow programming is a methodology that enables the development of high-level, parametric programs that are independent of the underlying platform. This approach is particularly useful for heterogeneous platforms, as it eliminates the need to rewrite ap ...

SPRINGER2023