Multi-Objective BDD Optimization for RRAM based Circuit Design

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In-memory computing is an emerging non-von Neumann computing paradigm where certain computational tasks are performed in memory by exploiting the physical attributes of the memory devices. Memristive devices such as phase-change memory (PCM), where informa ...

In-memory computing using resistive memory devices is a promising non-von Neumann approach for making energy-efficient deep learning inference hardware. However, due to device variability and noise, the network needs to be trained in a specific way so that ...

Resistive switching memory technologies (RRAM) are seen by most of the scientific community as an enabler for Edge-level applications such as embedded deep Learning, AI or signal processing of audio and video signals. However, going beyond a "simple'' repl ...

While Resistive Random Access Memories (RRAM) are perceived nowadays as a promising solution for the future of computing, these technologies suffer from intrinsic variability regarding programming voltage, switching speed and achieved resistance values. Wr ...

Embedded memories, mostly implemented with static random access memory (SRAM), dominate the area and power of integrated circuits. Gain-cell embedded DRAM (GC-eDRAM) is an alternative to SRAM due to its high density, low power consumption, and two-ported f ...

Highly data-centric AI workloads require that new computing paradigms be adopted because the performance of traditional CPU- and GPU-based systems are limited by data access and transfer. Training deep neural networks with millions of tunable parameters ta ...

The growing importance of applications based on machine learning is driving the need to develop dedicated, energy-efficient electronic hardware. Compared with von Neumann architectures, which have separate processing and storage units, brain-inspired in-me ...

The revolution of information-technology owes to silicon-based complementary-metal-oxide (CMOS) technology. However, CMOS technology approaches its physical limitation hardening the further progress of memory devices as well as computing paradigm requiring ...

The need for running complex Machine Learning (ML) algorithms, such as Convolutional Neural Networks (CNNs), in edge devices, which are highly constrained in terms of computing power and energy, makes it important to execute such applications efficiently. ...

Resistive Random Access Memories (ReRAMs) have been researched intensively in the last past decades as a promising alternatives technology for the next-generation non-volatile memory (NVM) devices. ReRAMâ s excellent performance properties such as high sw ...

Non-Volatile Memory offers the possibility of implementing high-performance, durable data structures. However, achieving performance comparable to well-designed data structures in non-persistent (transient) memory is difficult, primarily because of the cos ...

Energy efficiency remains a challenge for the design of non-volatile resistive memories (ReRAMs) arrays. This memory technology suffers from intrinsic variability in switching speed, programming voltages and resistance levels. The programming conditions of ...

Multi-Objective BDD Optimization for RRAM based Circuit Design

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Accurate Emulation of Memristive Crossbar Arrays for In-Memory Computing

Accurate deep neural network inference using computational phase-change memory

Exploration Methodology for BTI-Induced Failures on RRAM-Based Edge AI Systems

Write Termination circuits for RRAM : A Holistic Approach From Technology to Application Considerations

Replica Bit-Line Technique for Internal Refresh in Logic-Compatible Gain-Cell Embedded DRAM

Multi-memristive synaptic architectures for training neural networks

Logic-in-memory based on an atomically thin semiconductor

ReRAM From Material Study to CMOS Co-integration

A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories

Material and Electrical study of HfO2-Based Resistive Random Access Memories (ReRAMs)

Fine-Grain Checkpointing with In-Cache-Line Logging

Switching event detection and self-termination programming circuit for energy efficient ReRAM memory arrays