Publications associées à Self-Scaling Stream Processing: a Bio-Inspired Approach to Resource Allocation through Dynamic Task Replication

Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism

Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher pow ...

MDPI2024

The 2024 Magnonics Roadmap

Dirk Grundler, Benedetta Flebus, Ping Che, Wei Zhang, Thomas Yu, Qi Wang

Magnonics is a research field that has gained an increasing interest in both the fundamental and applied sciences in recent years. This field aims to explore and functionalize collective spin excitations in magnetically ordered materials for modern informa ...

2024

Secure and Efficient Cryptographic Algorithms in a Quantum World

Loïs Evan Huguenin-Dumittan

Since the advent of internet and mass communication, two public-key cryptographic algorithms have shared the monopoly of data encryption and authentication: Diffie-Hellman and RSA. However, in the last few years, progress made in quantum physics -- and mo ...

EPFL2024

Design and in vitro Characterization of a Wearable Multisensing System for Hydration Monitoring

Sandro Carrara, Sarah Tonello, Ata Jedari Golparvar, Ali Meimandi

Dehydration is a frequent condition in the elderly and can lead to serious health complications if not compensated timely. Early diagnosis can be problematic, as medical examinations in the hospital would be needed. Fully wearable low-cost multisensing dev ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Acceleration of Control Intensive Applications on Coarse-Grained Reconfigurable Arrays for Embedded Systems

David Atienza Alonso, Benoît Walter Denkinger, Miguel Peon Quiros

Embedded systems confront two opposite goals: low-power operation and high performance. The current trend to reach these goals is toward heterogeneous platforms, including multi-core architectures with heterogeneous cores and hardware accelerators. The lat ...

2023

The JPEG AI Standard: Providing Efficient Human and Machine Visual Data Consumption

Touradj Ebrahimi

The Joint Photographic Experts Group (JPEG) AI learning-based image coding system is an ongoing joint standardization effort between International Organization for Standardization (ISO), International Electrotechnical Commission (IEC), and International Te ...

IEEE COMPUTER SOC2023

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

Aurélien François Gilbert Bloch

Today's continued increase in demand for processing power, despite the slowdown of Moore's law, has led to an increase in processor count, which has resulted in energy consumption and distribution problems. To address this, there is a growing trend toward ...

EPFL2023

Exploring brain-inspired multi-core heterogeneous hardware templates for low-power biomedical embedded systems

Benoît Walter Denkinger

The miniaturization of integrated circuits (ICs) and their higher performance and energy efficiency, combined with new machine learning algorithms and applications, have paved the way to intelligent, interconnected edge devices. In the medical domain, they ...

EPFL2023

Impact of Video Processing Operations in Deepfake Detection

Touradj Ebrahimi, Yuhang Lu

The detection of digital face manipulation in video has attracted extensive attention due to the increased risk to public trust. To counteract the malicious usage of such techniques, deep learning-based deepfake detection methods have been developed and ha ...

2023

Design Space Exploration for Partitioning Dataflow Program on CPU-GPU Heterogeneous System

Marco Mattavelli, Simone Casale Brunet, Aurélien François Gilbert Bloch

Dataflow programming is a methodology that enables the development of high-level, parametric programs that are independent of the underlying platform. This approach is particularly useful for heterogeneous platforms, as it eliminates the need to rewrite ap ...

SPRINGER2023

Chaosity: Understanding Contemporary NUMA-architectures

Anastasia Ailamaki, Viktor Sanca, Syed Mohammad Aunn Raza, Hamish Mcniece Hill Nicholson, Andreea Nica

Modern hardware is increasingly complex, requiring increasing effort to understand in order to carefully engineer systems for optimal performance and effective utilization. Moreover, established design principles and assumptions are not portable to modern ...

2023

Tumescense monitoring system for diagnosing erectile dysfunction and methods of use

Nikolaos Stergiopoulos, Rodrigo Araujo Fraga Da Silva

Systems and methods for monitoring penile tumescence are provided that overcome the drawbacks of previously known systems by providing a wearable formed of a flexible and elastic tube having a plurality of sensors disposed on or embedded within it, the wea ...

2023

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

Mirjana Stojilovic, David Dervishi, Dina Gamaleldin Ahmed Shawky Mahmoud

Field-programmable gate arrays (FPGAs) combine hardware reconfigurability with a high degree of parallelism. Consequently, FPGAs offer performance gains and power savings for many applications. A recent trend has been to leverage the hardware versatility o ...

2022

Design for Test With Unreliable Memories by Restoring the Beauty of Randomness

Andreas Peter Burg, Marco Widmer, Reza Ghanaatian Jahromi

This article presents a design-for-test methodology for embedded memories. The methodology relies on a fully random fault model of post-fabrication errors, which results in a low-overhead test strategy. The methodology's effectiveness is demonstrated on an ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

SIMD Parallel Execution on GPU from High-Level Dataflow Synthesis

Marco Mattavelli, Simone Casale Brunet, Aurélien François Gilbert Bloch

Writing and optimizing application software for heterogeneous platforms including GPU units is a very difficult task that requires designer efforts and resources to consider several key elements to obtain good performance. Dataflow programming has shown to ...

2022

Dalton: Learned Partitioning for Distributed Data Streams

Anastasia Ailamaki, Ioannis Mytilinis, Eleni Zapridou

To sustain the input rate of high-throughput streams, modern stream processing systems rely on parallel execution. However, skewed data yield imbalanced load assignments and create stragglers that hinder scalability. Deciding on a static partitioning for a ...

2022

Dynamic SIMD Parallel Execution on GPU from High-Level Dataflow Synthesis

Marco Mattavelli, Simone Casale Brunet, Aurélien François Gilbert Bloch

Developing and fine-tuning software programs for heterogeneous hardware such as CPU/GPU processing platforms comprise a highly complex endeavor that demands considerable time and effort of software engineers and requires evaluating various fundamental comp ...

MDPI2022

Towards JPEG AIC part 3: visual quality assessment of high to visually lossless image coding

Touradj Ebrahimi, Evgeniy Upenik, Michela Testolina

Due to the increasing number of pictures captured and stored every day by and on digital devices, lossy image compression has become inevitable to limit the needed storage requirement. As a consequence, these compression methods might introduce some visual ...

SPIE2022

Cockroach: an open-source tool for point cloud processing in cad

Yves Weinand, Julien Gamerro, Andrea Settimi, Petras Vestartas

In the architecture, engineering and construction (AEC) sector, the use of point cloud data is not a novelty. Usually employed to retrieve data for inspecting construction sites or retrofitting pre-existing buildings, sensors like LiDAR cameras have been k ...

Association for Computer-Aided Architectural Design Research in Asia (CAADRIA)2022

JPEG XS-A New Standard for Visually Lossless Low-Latency Lightweight Image Coding

Touradj Ebrahimi

Joint Photographic Experts Group (JPEG) XS is a new International Standard from the JPEG Committee (formally known as ISO/International Electrotechnical Commission (IEC) JTC1/SC29/WG1). It defines an interoperable, visually lossless low-latency lightweight ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021