Inverter Propagation and Fan-Out Constraints for Beyond-CMOS Majority-Based Technologies

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Inverter Propagation and Fan-Out Constraints for Beyond-CMOS Majority-Based Technologies

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Scalable Logic Rewriting Using Don’t Cares

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Improving Standard-Cell Design Flow using Factored Form Optimization

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks

Energy-Efficient Electronic Functions Based on the Co-integration of 2D and Ferroelectric Materials

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

Utilizing XMG-based Synthesis to Preserve Self-Duality for RFET-Based Circuits

Logic Synthesis From Incomplete Specifications Using Disjoint Support Decomposition

Exploring negative capacitance and neuromorphic devices based on CMOS-compatible ferroelectric HfO2

A Deep-Learning Approach to Side-Channel Based CPU Disassembly at Design Time

Three-Input Gates for Logic Synthesis

Preserving Self-Duality During Logic Synthesis for Emerging Reconfigurable Nanotechnologies

A Deeper Look at the Energy Consumption of Lightweight Block Ciphers

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

Further Results on Efficient Implementations of Block Cipher Linear Layers

Random flip-flop: adding quantum randomness to digital circuits for improved cyber security, artificial intelligence and more