Publication

RRAM Crossbar Arrays for Storage Class Memory Applications : Throughput and Density Considerations

Publications associées (32)

Method for reading and writing unreliable memories and a corresponding memory controller device and memory

Andreas Peter Burg, Reza Ghanaatian Jahromi

A method of accessing a memory space of a memory device with a decoder, the memory space having faults, including the steps of performing a memory access operation by an electronic device to a access a logical memory space of the memory device, and randomi ...

2022

AstriFlash: A Flash-Based System for Online Services

Babak Falsafi, Mark Johnathon Sutherland, Siddharth Gupta, Lei Yan, Yunho Oh

Modern datacenters host datasets in DRAM to offer large-scale online services with tight tail-latency requirements. Unfortunately, as DRAM is expensive and increasingly difficult to scale, datacenter operators are forced to consider denser storage technolo ...

2023

Tuning paradigm of external stimuli driven electronic, optical and magnetic properties in hybrid perovskites and metalorganic complexes br

Mohammad Khaja Nazeeruddin

We have witnessed a wide range of theoretical as well as experimental investigations to envisage external stimuli induced changes in electronic, optical and magnetic properties in the metal organiccomplexes, while hybrid perovskites have recently joined th ...

ELSEVIER SCI LTD2022

Request, Coalesce, Serve, and Forget: Miss-Optimized Memory Systems for Bandwidth-Bound Cache-Unfriendly Applications on FPGAs

Paolo Ienne, Mikhail Asiatici

Applications such as large-scale sparse linear algebra and graph analytics are challenging to accelerate on FPGAs due to the short irregular memory accesses, resulting in low cache hit rates. Nonblocking caches reduce the bandwidth required by misses by re ...

ASSOC COMPUTING MACHINERY2022

HyperLogLog: Exponentially Bad in Adversarial Settings

Mathilde Aliénor Raynal

Computing the count of distinct elements in large data sets is a common task but naive approaches are memory-expensive. The HyperLogLog (HLL) algorithm (Flajolet et al., 2007) estimates a data set's cardinality while using significantly less memory than a ...

IEEE COMPUTER SOC2022

Low-Power Artificial Neural Network Perceptron Based on Monolayer MoS2

Andras Kis, Aleksandra Radenovic, Zhenyu Wang, Guilherme Migliato Marega, Mukesh Kumar Tripathi

Machine learning and signal processing on the edge are poised to influence our everyday lives with devices that will learn and infer from data generated by smart sensors and other devices for the Internet of Things. The next leap toward ubiquitous electron ...

2022

Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Flavio Ponzina, Marco Antonio Rios

The growing popularity of edge computing has fostered the development of diverse solutions to support Artificial Intelligence (AI) in energy-constrained devices. Nonetheless, comparatively few efforts have focused on the resiliency exhibited by AI workload ...

2022

An Accuracy-Driven Compression Methodology to Derive Efficient Codebook-Based CNNs

David Atienza Alonso, Giovanni Ansaloni, Miguel Peon Quiros, Flavio Ponzina

Codebook-based optimizations are a class of algorithmic-level transformations able to effectively reduce the computing and memory requirements of Convolutional Neural Networks (CNNs). This approach tightly limits the number of unique weights in each layer, ...

2022

Miss-Optimized Memory Systems: Turning Thousands of Outstanding Misses into Reuse Opportunities

Mikhail Asiatici

Even if Dennard scaling came to an end fifteen years ago, Moore' s law kept fueling an exponential growth in compute performance through increased parallelization. However, the performance of memory and, in particular, Dynamic Random Access Memory (DRAM), ...

EPFL2021

Software Support for Non-Volatile Memory (NVM) Programming

David Teksen Aksun

Non-Volatile Memory (NVM) is an emerging type of memory device that provides fast, byte-addressable, and high-capacity durable storage. NVM sits on the memory bus and allows durable data structures designs similar to the in-memory equivalent ones. Expensiv ...

EPFL2021

Memory chip or memory array for wide-voltage range in-memory computing using bitline technology

David Atienza Alonso, William Andrew Simon, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, Marco Antonio Rios

A random access memory having a memory array having a plurality of local memory groups, each local memory group including a plurality of bitcells arranged in a bitcell column, a pair of local bitlines operatively connected to the plurality of bitcells, a p ...

2021

Exploring ferroelectricity in HfO2-based thin films by tackling application-relevant challenges

Matteo Cavalieri

Ferroelectric materials offer a broad range of application-relevant properties, including spontaneous polarization switchable by electric field. Archetypical representatives of this class of materials are perovskites, currently used in applications ranging ...

EPFL2021