FudgeFactor: Syntax-Guided Synthesis for Accurate RTL Error Localization and Correction

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A Deep-Learning Approach to Side-Channel Based CPU Disassembly at Design Time

Mirjana Stojilovic

Side-channel CPU disassembly is a side-channel attack that allows an adversary to recover instructions executed by a processor. Not only does such an attack compromise code confidentiality, it can also reveal critical information on the system’s internals. ...

IEEE2022

A new versatile hybrid MEMS technology for high sensitivity, fluid proof sensing applications

Matthias Neuenschwander

The field of micro electromechanical systems (MEMS) evolved from the microelectronic industry and the technologies developed to fabricate integrated circuits. As a result, MEMS are commonly fabricated on silicon wafers. The development of MEMS has been dri ...

EPFL2022

Health data privacy through homomorphic encryption and distributed ledger computing: an ethical-legal qualitative expert assessment study

Marcello Ienca

Background: Increasingly, hospitals and research institutes are developing technical solutions for sharing patient data in a privacy preserving manner. Two of these technical solutions are homomorphic encryption and distributed ledger technology. Homomorph ...

BMC2022

Smart pooling: AI-powered COVID-19 informative group testing

Jorge Andres Madrid Wolff

Massive molecular testing for COVID-19 has been pointed out as fundamental to moderate the spread of the pandemic. Pooling methods can enhance testing efficiency, but they are viable only at low incidences of the disease. We propose Smart Pooling, a machin ...

Nature Portfolio2022

Unleashing Parallelism in Elastic Circuits with Faster Token Delivery

Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Ayatallah Ahmed Gamal Kamal Elakhras

High-level synthesis (HLS) is the process of automatically generating circuits out of high-level language descriptions. Previous research has shown that dynamically scheduled HLS through elastic circuit generation is successful at exploiting parallelism in ...

IEEE COMPUTER SOC2022

SEKV-E: Parameter Extractor of Simplified EKV I-V Model for Low-Power Analog Circuits

Christian Enz, Hung-Chi Han, Antonio D'Amico

This paper presents the open-source Python-based parameter extractor (SEKV-E) for the simplified EKV (sEKV) model, which enables the modern low-power circuit designs with the inversion coefficient design methodology. The tool extracts the essential sEKV pa ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Equivalent black carbon concentration in 10 minutes time resolution, measured in the Swiss container during MOSAiC 2019/2020

Julia Schmale, Ivo Fabio Beck, Lubna Dada, Benjamin Jérémy Laurent Heutte

This dataset contains equivalent black carbon (eBC) concentrations, averaged to 10 min time resolution, measured during the year-long MOSAiC expedition from October 2019 to September 2020. The measurements were performed in the Swiss container on the D-dec ...

Zenodo2022

Analytic modelling of passive microfluidic mixers

Jean-Michel Sallese

This paper deals with a new analytical model for microfluidic passive mixers. Two common approaches already exist for such a purpose. On the one hand, the resolution of the advection-diffusion-reaction equation (ADRE) is the first one and the closest to ph ...

AMER INST MATHEMATICAL SCIENCES-AIMS2022

Comparing the psychometric properties of two primary school Computational Thinking (CT) assessments for grades 3 and 4: The Beginners' CT test (BCTt) and the competent CT test (cCTt)

Barbara Bruno, Jessica Elke Dehler Zufferey, Laila Abdelsalam El-Hamamsy

Introduction: With the increasing amount of research around Computational Thinking (CT) and endeavors introducing CT into curricula worldwide, assessing CT at all levels of formal education is of utmost importance to ensure that CT-related learning objecti ...

Frontiers Media2022

An All-Digital 1 Mbps, 57 pJ/bit Bluetooth Low Energy (BLE) Backscatter ASIC in 65 nm CMOS

James Daniel Rosenthal

We present an all-digital application specific integrated circuit (ASIC) that implements Bluetooth Low Energy (BLE)-compatible backscatter communication. The ASIC was fabricated in a 65 nm CMOS process and occupies an active area of 0.12 mm(2) while consum ...

IEEE2022

Influence of amount of shear reinforcement and its post-yield response on the shear resistance of reinforced concrete members

Aurelio Muttoni, Miguel Fernández Ruiz, Frédéric Monney

The minimum amount of shear reinforcement to be provided in reinforced concrete members has been a topic of debate and research for decades without reaching a consensus. Defining such values is however instrumental to build in an economic manner and to saf ...

ERNST & SOHN2022

Utilizing XMG-based Synthesis to Preserve Self-Duality for RFET-Based Circuits

Giovanni De Micheli, Heinz Riener, Alessandro Tempia Calvino, Akash Kumar

Individual transistors based on emerging reconfigurable nanotechnologies exhibit electrical conduction for both types of charge carriers. These transistors (referred to as Reconfigurable Field-Effect Transistors (RFETs)) enable dynamic reconfiguration to d ...

2022