Publication

The Combined Effect of Process Variations and Power Supply Noise on Clock Skew and Jitter

Publications associées (31)

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

Machine learning and data processing algorithms have been thriving in finding ways of processing and classifying information by exploiting the hidden trends of large datasets. Although these emerging computational methods have become successful in today's ...

EPFL2023

DC Transformer Impact on Voltage Dynamics in Hybrid AC-DC Power Distribution Networks

Drazen Dujic, Max Dupont, Jules Christian Georges Macé, Renan Pillon Barcelos, Andrea Cervone

AC/DC power distribution networks use various types of power converters to interconnect their buses, active front ends between AC and DC buses, and DC transformers between DC buses. Different active front end control methods, like voltage or power regulati ...

VDE Verlag2023

Evaluating, Exploiting, and Hiding Power Side-Channel Leakage of Remote FPGAs

Ognjen Glamocanin

The pervasive adoption of field-programmable gate arrays (FPGAs) in both cyber-physical systems and the cloud has raised many security issues. Being integrated circuits, FPGAs are susceptible to fault and power side-channel attacks, which require physical ...

EPFL2023

Front-End Circuits for Radiation-Hard Monolithic CMOS Sensors targeting High-Energy Physics Applications

Francesco Piro

Monolithic pixel sensors integrate the sensor matrix and readout in the same silicon die, and therefore present several advantages over the more largely used hybrid detectors in high-energy physics. They offer an easier detector assembly, lower cost, lower ...

EPFL2023

Enablers for Overcurrent Capability of Silicon-Carbide-Based Power Converters: An Overview

Elison de Nazareth Matioli

With the increase in penetration of power electronic converters in the power systems, a demand for overcurrent/ overloading capability has risen for the fault clearance duration. This article gives an overview of the limiting factors and the recent technol ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023

Bed Topography Inference from Velocity Field Using Deep Learning

Christophe Ancey, Mehrdad Kiani Oshtorjani

Measuring bathymetry has always been a major scientific and technological challenge. In this work, we used a deep learning technique for inferring bathymetry from the depth-averaged velocity field. The training of the neural network is based on 5742 labora ...

2023

A 0.21-ps FOM Capacitor-Less Analog LDO with Dual-Range Load Current for Biomedical Applications

Mahsa Shoaran, Yasemin Engür

This paper presents an output capacitor-less low-dropout regulator (LDO) with a bias switching scheme for biomedical applications with dual-range load currents. Power optimization is crucial for systems with multiple activation modes such as neural interfa ...

ArXiv2023

Frequency Regulation with Storage: On Losses and Profits

François Richard Vuille, Dirk Lauinger, Daniel Kuhn

Low-carbon societies will need to store vast amounts of electricity to balance intermittent generation from wind and solar energy, for example, through frequency regulation. Here, we derive an analytical solution to the decision-making problem of storage o ...

2024

On Energy Control of Modular Multilevel Converters

Milan Utvic

Owing to the advancements in the area of power electronics, efficient and flexible ac to dc conversion is made possible, bringing back into focus the idea of the dc power transmission at various voltage levels. Several technical and economical factors advo ...

EPFL2023

Thermal and Power-Aware Run-Time Performance Management of 3D MPSoCs with Integrated Flow Cell Arrays

David Atienza Alonso, Halima Najibi, Giovanni Ansaloni, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse

Flow Cell Arrays (FCA) technology employs microchannels filled with an electrolytic fluid to concurrently provide cooling and power generation to integrated circuits (ICs). This solution is particularly appealing for Three-Dimensional Multi-Processor Syste ...

2022

An All-Digital 1 Mbps, 57 pJ/bit Bluetooth Low Energy (BLE) Backscatter ASIC in 65 nm CMOS

James Daniel Rosenthal

We present an all-digital application specific integrated circuit (ASIC) that implements Bluetooth Low Energy (BLE)-compatible backscatter communication. The ASIC was fabricated in a 65 nm CMOS process and occupies an active area of 0.12 mm(2) while consum ...

IEEE2022