Publications associées à Ultra Low Voltage Synthesizable Memories: A Trade-Off Discussion in 65 nm CMOS

Towards Scalable Electronics: Synthetic 2D Materials for Large-Area 2D Circuit Integration

In the past decades, a significant increase of the transistor density on a chip has led to exponential growth in computational power driven by Moore's law. To overcome the bottleneck of traditional von-Neumann architecture in computational efficiency, effo ...

EPFL2024

Strain relaxation and multidentate anchoring in n-type perovskite transistors and logic circuits

Mohammad Khaja Nazeeruddin, Olga Syzgantseva

The engineering of tin halide perovskites has led to the development of p-type transistors with field-effect mobilities of over 70 cm2 V-1 s-1. However, due to their background hole doping, these perovskites are not suitable for n-type transistors. Ambipol ...

Nature Portfolio2024

Active Voltage Balancing with Seamless Integration into Dual Gate Driver for Series Connection of SiC MOSFETs

Drazen Dujic

The versatility of half-bridge configuration of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) power module contributes to its widespread adoption, highlighting the popularity and significance of its corresponding dual gat ...

2024

EdgeAI-Aware Design of In-Memory Computing Architectures

Marco Antonio Rios

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

EPFL2024

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Siang-Yun Lee

Electronic devices play an irreplaceable role in our lives. With the tightening time to market, exploding demand for computing power, and continuous desire for smaller, faster, less energy-consuming, and lower-cost chips, computer-aided design for electron ...

EPFL2024

A Dual-Channel Gate Driver Design with Active Voltage Balancing Circuit for Series Connection of SiC MOSFETs

Drazen Dujic

Dual-channel gate driver is commonly utilized in the industry for accommodating the widespread use of half-bridge power modules. As wide-bandgap devices become increasingly prevalent due to their superior switching characteristics compared with conventiona ...

2024

Silicon CMOS and InGaAs(P)/InP SPADs for NIR/SWIR detection

Utku Karaca

Applications demanding imaging at low-light conditions at near-infrared (NIR) and short-wave infrared (SWIR) wavelengths, such as quantum information science, biophotonics, space imaging, and light detection and ranging (LiDAR), have accelerated the develo ...

EPFL2024

Integrated Wireless Power, Data Communication, and Thermal Sensing System for Autonomous Multisite Brain Implants

Implanted medical devices (IMDs) have been widely developed to support the monitoring and recording of biological data inside the body or brain. Wirelessly powered IMDs, a subset of implantable electronics, have been proposed to eliminate the limitations r ...

EPFL2024

Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism

Adam Shmuel Teman, Robert Giterman

Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher pow ...

MDPI2024

Highly Parallel RTL Simulation

Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

EPFL2024

SPAD Developed in 55 nm Bipolar-CMOS-DMOS Technology Achieving Near 90% Peak PDP

Claudio Bruschini, Edoardo Charbon, Francesco Gramuglia, Myung Jae Lee, Ekin Kizilkan, Pouyan Keshavarzian, Won Yong Ha

We present a single-photon avalanche diode (SPAD) developed in 55 nm bipolar-CMOS-DMOS (BCD) technology, which achieves high photon detection probability (PDP) while its breakdown voltage is lower than 20 V. To enhance the PDP performance, the SPAD junctio ...

Ieee-Inst Electrical Electronics Engineers Inc2024

How Integrated are Credit and Equity Markets? Evidence from Index Options

Pierre Collin Dufresne, Jan Benjamin Junge

We study the extent to which credit index (CDX) options are priced consistent with S&P 500 (SPX) equity index options. We derive analytical expressions for CDX and SPX options within a structural credit-risk model with stochastic volatility and jumps using ...

Wiley2024

Lithium tantalate photonic integrated circuits for volume manufacturing

Tobias Kippenberg, Kai Huang, Chen Yang, Mikhail Churaev, Xinru Ji, Yang Chen, Zihan Li, Alisa Davydova, Xi Wang, Junyin Zhang

Electro-optical photonic integrated circuits (PICs) based on lithium niobate (LiNbO3) have demonstrated the vast capabilities of materials with a high Pockels coefficient1,2. They enable linear and high-speed modulators operating at complementary metal–oxi ...

2024

Doping Engineering for PDP Optimization in SPADs Implemented in 55-nm BCD Process

Claudio Bruschini, Edoardo Charbon, Myung Jae Lee, Feng Liu

We introduce a new family of single-photon avalanche diodes (SPADs) with enhanced depletion regions in a 55-nm Bipolar-CMOS-DMOS (BCD) technology. We demonstrate how to systematically engineer doping profiles in the main junction and in deep p-well layers ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Phase Shift Angle Segmentation Modulation for Soft-Switching Medium-Voltage DAB Converter With Series-Connected SiC MOSFETs

Heng Fang, Rui Lu, Chengmin Li

The medium-voltage (MV) dual active bridge (DAB) converter with series-connected SiC (S-SiC) MOSFETs is a promising solution for high-power-density isolated dc/dc converter. To improve the voltage sharing and reliability of S-SiC, relatively large snubber ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

David Atienza Alonso, Giovanni Ansaloni, Alireza Amirshahi

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

2024

Font Side Solutions for c-Si Solar Cells with High-Temperature Passivating Contacts

Ezgi Genç

In this work, we studied the potential of using thin films deposited by plasma-enhanced chemical vapor deposition (PECVD) for two main purposes: introducing an n-type passivating contact at the front of a TOPCon solar cell, or simplifying the fabrication o ...

EPFL2024

Polarization-enhanced GaN Schottky barrier diodes: Ultra-thin InGaN for high breakdown voltage and low Ron

Elison de Nazareth Matioli, Alessandro Floriduz, Zheng Hao

In this work, we present a concept that leverages the strong piezoelectric polarization field in InGaN, which counteracts the external electric field at reverse bias. We show that despite the smaller InGaN band-gap and lower critical electric field, its st ...

2024

Light-Intensity Switching of Graphene/WSe2 Synaptic Devices

Giulia Tagliabue, Tarique Anwar, Hongyu Tang

2D van der Waals heterojunctions (vdWH) have emerged as an attractive platform for the realization of optoelectronic synaptic devices, which are critical for energy-efficient computing systems. Photogating induced by charge traps at the interfaces indeed r ...

Wiley2024

Energy-Efficient Electronic Functions Based on the Co-integration of 2D and Ferroelectric Materials

Sadegh Kamaei Bahmaei

The digital revolution has significantly transformed our world over the past decades, driven by the scaling of transistor dimensions and the exponential increase in computation power. However, as the CMOS scaling era approaches its end, the semiconductor i ...

EPFL2023