Majority Logic Synthesis

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Electroreduction of carbon dioxide (CO2) in a flow electrolyzer represents a promising carbon-neutral technology with efficient production of valuable chemicals. In this work, the catalytic performance of polycrystalline copper (Cu), Cu2O-derived copper (O ...

High-level synthesis is a mature Electronics Design Automation (EDA) technology for building hardware design in a short time. It produces automatically HDL code for FPGAs out of C/C++, bridging the gap from algorithm to hardware. Nevertheless, sometimes th ...

A central task in high-level synthesis is scheduling: the allocation of operations to clock cycles. The classic approach to scheduling is static, in which each operation is mapped to a clock cycle at compile-time, but recent years have seen the emergence o ...

High-level synthesis (HLS) is the process of automatically generating circuits out of high-level language descriptions. Previous research has shown that dynamically scheduled HLS through elastic circuit generation is successful at exploiting parallelism in ...

Field-programmable gate arrays (FPGAs) combine hardware reconfigurability with a high degree of parallelism. Consequently, FPGAs offer performance gains and power savings for many applications. A recent trend has been to leverage the hardware versatility o ...

The performance of programs written in languages following the dataflow model of computation (MoC) largely depends on the configuration (partitioning, mapping, scheduling, buffer dimensioning) chosen during the synthesis stages. Furthermore, this programmi ...

Model compression techniques have lead to a reduction of size and number of computations of Deep Learning models. However, techniques such as pruning mostly lack of a real co-optimization with hardware platforms. For instance, implementing unstructured pru ...

We present the joint analysis of Neutral Hydrogen (H I) Intensity Mapping observations with three galaxy samples: the Luminous Red Galaxy (LRG) and Emission Line Galaxy (ELG) samples from the eBOSS survey, and the WiggleZ Dark Energy Survey sample. The H I ...

The NANOGrav, Parkes, European, and International Pulsar Timing Array (PTA) Collaborations have reported evidence for a common-spectrum process that can potentially correspond to a stochastic gravitational wave background (SGWB) in the 1-100 nHz frequency ...

Emerging reconfigurable nanotechnologies allow the implementation of self-dual functions with a fewer number of transistors as compared to traditional CMOS technologies. To achieve better area results for Reconfigurable Field-Effect Transistors (RFET)-base ...

The beginning of 21st century provided us with many answers about how to reach the channel capacity. Polarization and spatial coupling are two techniques for achieving the capacity of binary memoryless symmetric channels under low-complexity decoding algor ...

Majority Logic Synthesis

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Revisiting the Impact of Morphology and Oxidation State of Cu on CO2 Reduction Using Electrochemical Flow Cell

Optimizing Lattice-based Post-Quantum Cryptography Codes for High-Level Synthesis

DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis

Unleashing Parallelism in Elastic Circuits with Faster Token Delivery

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

Performance Estimation of High-Level Dataflow Program on Heterogeneous Platforms

Structured and tiled-based pruning of Deep Learning models targeting FPGA implementations

H I constraints from the cross-correlation of eBOSS galaxies and Green Bank Telescope intensity maps

Gravitational wave signal from primordial magnetic fields in the Pulsar Timing Array frequency band

Preserving Self-Duality During Logic Synthesis for Emerging Reconfigurable Nanotechnologies

Symmetry in design and decoding of polar-like codes