Hardware and Software Support for RPC-Centric Server Architecture

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Analytical engines rely on in-memory data caching to avoid storage accesses and provide timely responses by keeping the most frequently accessed data in memory. Purely frequency- and time-based caching decisions, however, are a proxy of the expected query ...

Accessing input data is a critical operation in data analytics: i) slow data access significantly degrades performance, and ii) storing everything in the fastest medium, i.e., memory, incurs high operational and hardware costs. Further, while GPUs offer in ...

The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators. Specialized hardware has already redefine ...

Network neutrality is important for users, content providers, policymakers, and regulators interested in understanding how network providers differentiate performance. When determining whether a network differentiates against certain traffic, it is importa ...

Biphoton frequency combs (BFCs) are promising quantum sources for large-scale and high-dimensional quantum information and networking systems. In this context, the spectral purity of individual frequency bins will be critical for realizing quantum networki ...

Laser-induced forward transfer (LIFT) technique is an emerging micro additive manufacturing (AM) technique that has been widely used to print a variety of materials. Distinguished from other nozzle-based AM techniques, LIFT operates without the existence o ...

Federated learning is a semi-distributed algorithm, where a server communicates with multiple dispersed clients to learn a global model. The federated architecture is not robust and is sensitive to communication and computational overloads due to its one-m ...

This thesis demonstrates that it is feasible for systems code to expose a latency interface that describes its latency and related side effects for all inputs, just like the code's semantic interface describes its functionality and related side effects. S ...

Principal component analysis (PCA) is an essential algorithm for dimensionality reduction in many data science domains. We address the problem of performing a federated PCA on private data distributed among multiple data providers while ensuring data confi ...

By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with little additional o ...

Hardware and Software Support for RPC-Centric Server Architecture

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HPCache: memory-efficient OLAP through proportional caching revisited

HetCache: Synergising NVMe Storage and GPU acceleration for Memory-Efficient Analytics

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Localizing Traffic Differentiation

Time-Resolved Hanbury Brown-Twiss Interferometry of On-Chip Biphoton Frequency Combs Using Vernier Phase Modulation

Laser-Induced Forward Transfer of Functional Microdevices

Privatized graph federated learning

Latency Interfaces for Systems Code

Scalable and Privacy-Preserving Federated Principal Component Analysis

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference