Delite: A Compiler Architecture for Performance-Oriented Embedded Domain-Specific Languages

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In data-parallel optimization of machine learning models, workers collaborate to improve their estimates of the model: more accurate gradients allow them to use larger learning rates and optimize faster. In the decentralized setting, in which workers commu ...

Modern computing systems are so energy- intensive to make efficient cooling vital for their operation. This is giving rise to a variety of innovative cooling solutions based on a mix of traditional and new techniques. The design and engineering of these so ...

Formally verifying the correctness of software network functions (NFs) is necessary for network reliability, yet existing techniques require full source code and mandate the use of specific data structures. We describe an automated technique to verify NF b ...

Code-reuse attacks are dangerous threats that attracted the attention of the security community for years. These attacks aim at corrupting important control-flow transfers for taking control of a process without injecting code. Nowadays, the combinations o ...

High-level synthesis (HLS) is the process of automatically generating circuits out of high-level language descriptions. Previous research has shown that dynamically scheduled HLS through elastic circuit generation is successful at exploiting parallelism in ...

Writing and optimizing application software for heterogeneous platforms including GPU units is a very difficult task that requires designer efforts and resources to consider several key elements to obtain good performance. Dataflow programming has shown to ...

Developing and fine-tuning software programs for heterogeneous hardware such as CPU/GPU processing platforms comprise a highly complex endeavor that demands considerable time and effort of software engineers and requires evaluating various fundamental comp ...

Formal verification of real-world software systems remains challenging for a number of reasons, including lack of automation, friction in specifying properties, and limited support for the diverse programming paradigms used in industry. In this thesis we m ...

High-level synthesis (HLS) tools typically generate statically scheduled datapaths. Static scheduling implies that the resulting circuits have a hard time exploiting parallelism in code with potential memory dependences, with control dependences, or where ...

Recent GPU architectures make available numbers of parallel processing units that exceed by orders of magnitude the ones offered by CPU architectures. Whereas programs written using dataflow programming languages are well suited for programming heterogeneo ...

Delite: A Compiler Architecture for Performance-Oriented Embedded Domain-Specific Languages

Chattez avec Graph Search

Beyond Spectral Gap: The Role of the Topology in Decentralized Learning

Object-oriented modelling of advanced computer cooling solutions

Automated Verification of Network Function Binaries

WarpAttack: Bypassing CFI through Compiler-Introduced Double-Fetches

Unleashing Parallelism in Elastic Circuits with Faster Token Delivery

SIMD Parallel Execution on GPU from High-Level Dataflow Synthesis

Dynamic SIMD Parallel Execution on GPU from High-Level Dataflow Synthesis

Scaling Language Features for Program Verification

From C/C plus plus Code to High-Performance Dataflow Circuits

Inter-actions parallel execution on GPU from high-level dataflow synthesis