Publications associées à Generating Configurable Hardware from Parallel Patterns

Publications associées (28)

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Electronic devices play an irreplaceable role in our lives. With the tightening time to market, exploding demand for computing power, and continuous desire for smaller, faster, less energy-consuming, and lower-cost chips, computer-aided design for electron ...

EPFL2024

Highly Parallel RTL Simulation

Seyedmahyar Emami

Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

EPFL2024

SOMOphilic alkyne vs radical-polar crossover approaches: The full story of the azido-alkynylation of alkenes

Jérôme Waser, Julien Aymeric Borrel

We report the detailed background for the discovery and development of the synthesis of homopropargylic azides by the azidoalkynylation of alkenes. Initially, a strategy involving SOMOphilic alkynes was adopted, but only resulted in a 29% yield of the desi ...

Beilstein-Institut2024

SAT-based Exact Modulo Scheduling Mapping for Resource-Constrained CGRAs

David Atienza Alonso, Giovanni Ansaloni, José Angel Miranda Calero, Benoît Walter Denkinger, Juan Pablo Sapriza Araujo, Ruben Rodriguez, Rubén Rodríguez Álvarez

Coarse-Grain Reconfigurable Arrays (CGRAs) represent emerging low-power architectures designed to accelerate Compute-Intensive Loops (CILs). The effectiveness of CGRAs in providing acceleration relies on the quality of mapping: how efficiently the CIL is c ...

2024

EdgeAI-Aware Design of In-Memory Computing Architectures

Marco Antonio Rios

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

EPFL2024

X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don’t-Care Hardware Trojans to Shared Cloud FPGAs

Mirjana Stojilovic, Dina Gamaleldin Ahmed Shawky Mahmoud, Beatrice Shokry Samir Shokry

Cloud computing environments increasingly provision field-programmable gate arrays (FPGAs) for their programmability and hardware-level parallelism. While FPGAs are typically used by one tenant at a time, multitenant schemes supporting spatial sharing of c ...

2024

DBFS: Dynamic Bitwidth-Frequency Scaling for Efficient Software-defined SIMD

Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Flavio Ponzina, Pengbo Yu

Machine learning algorithms such as Convolutional Neural Networks (CNNs) are characterized by high robustness towards quantization, supporting small-bitwidth fixed-point arithmetic at inference time with little to no degradation in accuracy. In turn, small ...

IEEE2024

Scalable Logic Rewriting Using Don’t Cares

Giovanni De Micheli, Alessandro Tempia Calvino

Logic rewriting is a powerful optimization technique that replaces small sections of a Boolean network with better implementations. Typically, exact synthesis is used to compute optimum replacement on-the-fly, with possible support for Boolean don't cares. ...

2024

Decoding electroencephalographic responses to visual stimuli compatible with electrical stimulation

Silvestro Micera, Laura Toni, Fiorenzo Artoni, Simone Romeni

Electrical stimulation of the visual nervous system could improve the quality of life of patients affected by acquired blindness by restoring some visual sensations, but requires careful optimization of stimulation parameters to produce useful perceptions. ...

Aip Publishing2024

Modeling and optimization of PCB coils for inductive power transfer systems

Xiaotong Du

The auxiliary power supply for medium voltage converters requires high insulation capability between the source and the load. Inductive power transfer technology, with an air gap between the primary and secondary coil, offers such high insulation capabilit ...

EPFL2024

Mesh-based topology, shape and sizing optimization of ribbed plates

Ahmad Abdulrahman Ahmad Majdouba

In this paper, we present a new parameterization and optimization procedure for minimizing the weight of ribbed plates. The primary goal is to reduce embodied CO2 in concrete floors as part of the effort to diminish the carbon footprint of the construction ...

Springer2024

A method and system for optimizing design, implantation, and stimulation protocols of electrodes stimulating the nervous system

Silvestro Micera, Simone Romeni

A method for optimizing at least one of a geometry, an implantation procedure, and/or stimulation protocol of one or more electrodes for an electrical stimulation of a target structure in a nervous system of a living being by a computer device, the method ...

2024

Scalable constrained optimization

Maria-Luiza Vladarean

Modern optimization is tasked with handling applications of increasingly large scale, chiefly due to the massive amounts of widely available data and the ever-growing reach of Machine Learning. Consequently, this area of research is under steady pressure t ...

EPFL2024

Automated Formal Verification of Software Network Functions

Solal Vincenzo Pirelli

Formally verifying the correctness of software is necessary to merit the trust people put in software systems. Currently, formal verification requires human effort to prove that a piece of code matches its specification and code changes to improve verifiab ...

EPFL2024

Precision luminosity measurement at hadron colliders

Joanna Malgorzata Wanczyk

This thesis links two realms of particle accelerator dynamics and precision particle physics. The achievement of precise luminosity measurement at hadron colliders is enabled with dedicated luminometers. For the Run 3 period, the luminometer upgrade was ...

EPFL2024

Algebraic and Boolean Methods for SFQ Superconducting Circuits

Giovanni De Micheli, Alessandro Tempia Calvino

Rapid single-flux quantum (RSFQ) is one of the most advanced and promising superconducting logic families, offering exceptional energy efficiency and speed. RSFQ technology requires delay registers (DFFs) and splitter cells to satisfy the path-balancing an ...

2024

Energy-Efficient Particle Accelerators for Research

Mike Seidel

Particle accelerators are the drivers for large-scale research infrastructures for particle physics but also for many branches of condensed matter research. The types of accelerator-driven research infrastructures include particle colliders, neutron, muon ...

2024

Violation-aware contextual Bayesian optimization for controller performance optimization with unmodeled constraints

Colin Neil Jones, Wenjie Xu

We study the problem of performance optimization of closed -loop control systems with unmodeled dynamics. Bayesian optimization (BO) has been demonstrated to be effective for improving closed -loop performance by automatically tuning controller gains or re ...

Elsevier Sci Ltd2024

Bridging Monte Carlo worlds: a new framework for accelerator simulations applied on shielding and machine protection studies

André Donadon Servelle

This thesis delves into the critical study of particle transport in matter, particularly emphasising its implications for machine protection at CERN's accelerator complex and facilities. To conduct studies of this nature, FLUKA and Geant4 stand out within ...

EPFL2024

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

Stefan Nikolic

With Moore's law coming to an end, increasingly more hope is being put in specialized hardware implemented on reconfigurable architectures such as Field-Programmable Gate Arrays (FPGAs). Yet, it is often neglected that these architectures themselves experi ...

EPFL2023