Time resolution and power consumption of a monolithic silicon pixel prototype in SiGe BiCMOS technology

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In this work we propose and experimentally validate a relaxation spiking oscillator architecture with ultra-high tuning range (higher than 400%, from 5KHz to more than 25kHz when the control voltage is varied from 2.5 to 5V) that exploits the reversible me ...

The double-gate (DG) junction field-effect transistor (JFET) is a classical electron device, with a simple structure that presents many advantages in terms of device fabrication but also its principle of operation. The device has been largely used in low-n ...

We present a complete pixel based on a single-photon avalanche diode (SPAD) fabricated in a backside-illuminated (BSI) 3D IC technology. The chip stack comprises an image sensing tier produced in a 65-nm image sensor technology and a data processing tier i ...

LinoSPAD is a reconfigurable camera sensor with a 256x 1 CMOS SPAD (single-photon avalanche diode) pixel array connected to a low cost Xilinx Spartan 6 FPGA. The LinoSPAD sensor's line of pixels has a pitch of 24 pm and 40% fill factor. The FPGA implements ...

This work reports a technique to fabricate ReRAM crossbar arrays co-integrated with fully finished 180 nm CMOS technology chips. The proposed integration method enables low- cost ReRAM-CMOS integration and allows the rapid prototyping of complete memory sy ...

Intelligent robotic systems that can react to unprogrammed tasks and unforeseen environmental changes require augmented "softness." Robogami, a low-profile origami robot, addresses intrinsic (material-wise) and extrinsic (mechanism-wise) softness with its ...

Nanoscale CMOS devices display very high peak transit frequency Ft of several hundreds of GHz. This feature can be exploited for reducing power consumption by shifting the operating point towards moderate or eventually weak inversion where the Ft still rea ...

A novel compressive sampling scheme suitable for highly scalable hardware implementations is presented. The scheme utilizes an identical pseudo-random sequence for every image column, therefore reducing in-pixel hardware complexity and allowing measurement ...

This paper presents a remote powering realization for smart orthopedic implants with a full-wave rectifier and a voltage doubler. The measured power efficiency of the rectifier at 13.56 MHz is 80% for an output power of 20 mW with 2.2 V output. The rectifi ...

Electrical impedance tomography (EIT) can image the distribution of ventilated lung tissue, and is thus a promising technology to help monitor patient breathing to help selection of mechanical ventilation parameters. Two key difficulties in EIT instrumenta ...

This article presents a fully on-chip low-power LDO voltage regulator dedicated to remotely powered wireless cortical implants. This regulator is stable over the full range of alternating load current and provides fast load regulation achieved by applying ...

Time resolution and power consumption of a monolithic silicon pixel prototype in SiGe BiCMOS technology

Chattez avec Graph Search

High Tuning Range Spiking 1R-1T VO2 Voltage-Controlled Oscillator for Integrated RF and Optical Sensing

CJM: A Compact Model for Double-Gate Junction FETs

A High-PDE, Backside-Illuminated SPAD in 65/40-nm 3D IC CMOS Pixel With Cascoded Passive Quenching and Active Recharge

LinoSPAD: a time-resolved 256x1 CMOS SPAD line sensor system featuring 64 FPGA-based TDC channels running at up to 8.5 giga-events per second

Chip-Level CMOS Co-Integration of ReRAM-Based Non-Volatile Memories

Robogami: A Fully Integrated Low-Profile Robotic Origami

Accurate RF modeling of nanoscale MOSFET using BSIM6 including low levels of inversion

Column-Separated Compressive Sampling Scheme for Low Power CMOS Image Sensors

Remote Powering Realization for Smart Orthopedic Implants

Electrical impedance tomography system based on active electrodes

A fully on-chip LDO voltage regulator with 37 dB PSRR at 1 MHz for remotely powered biomedical implants