Publications associées à Bridging the gap between dataplanes and commodity operating systems

Time vs. Truth: Age-Distortion Tradeoffs and Strategies for Distributed Inference

In 1948, Claude Shannon laid the foundations of information theory, which grew out of a study to find the ultimate limits of source compression, and of reliable communication. Since then, information theory has proved itself not only as a quest to find the ...

EPFL2023

Localizing Traffic Differentiation

Aikaterini Argyraki, Pavlos Nikolopoulos, Zeinab Shmeis, Muhammad Abdullah

Network neutrality is important for users, content providers, policymakers, and regulators interested in understanding how network providers differentiate performance. When determining whether a network differentiates against certain traffic, it is importa ...

2023

A Network Calculus Analysis of Asynchronous Mechanisms in Time-Sensitive Networks

Ehsan Mohammadpour

Time-sensitive networks provide worst-case guarantees for applications in domains such as the automobile, automation, avionics, and the space industries. A violation of these guarantees can cause considerable financial loss and serious damage to human live ...

EPFL2023

Latency Interfaces for Systems Code

Rishabh Ramesh Iyer

This thesis demonstrates that it is feasible for systems code to expose a latency interface that describes its latency and related side effects for all inputs, just like the code's semantic interface describes its functionality and related side effects. S ...

EPFL2023

Performance investigation of cameras using HDR sensors for daylight glare evaluations

Jan Wienold, Geraldine Cai Ting Quek, Dong Hyun Kim

This study presents a novel framework for evaluating the luminance measurement capabilities of High Dynamic Range (HDR) sensor cameras in indoor glare conditions. Results indicate that the practical usage range of the CSEM VIP camera is significantly lower ...

International Commission on Illumination2023

Analysis of Dampers in Time-Sensitive Networks With Non-Ideal Clocks

Jean-Yves Le Boudec, Ehsan Mohammadpour

Dampers are devices that reduce delay jitter in the context of time-sensitive networks, by delaying packets for the amount written in packet headers. Jitter reduction is required by some real-time applications; beyond this, dampers have the potential to so ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Hardware and Software Support for RPC-Centric Server Architecture

Mark Johnathon Sutherland

Online services have become ubiquitous in technological society, the global demand for which has driven enterprises to construct gigantic datacenters that run their software. Such facilities have also recently become a substrate for third-party organizatio ...

EPFL2022

A Low-Complexity LoRa Synchronization Algorithm Robust to Sampling Time Offsets

Orion Afisiadis, Mathieu Pierre Xhonneux

LoRaWAN is nowadays one of the most popular protocols for low-power Internet of Things communications. Although its physical layer, namely LoRa, has been thoroughly studied in the literature, aspects related to the synchronization of LoRa receivers have re ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

A Maximum-Likelihood-Based Two-User Receiver for LoRa Chirp Spread-Spectrum Modulation

Andreas Peter Burg, Alexios Konstantinos Balatsoukas Stimming, Orion Afisiadis, Joachim Tobias Tapparel, Mathieu Pierre Xhonneux

Long Range (LoRa) is an emerging low-power wide-area network technology offering long-range wireless connectivity to Internet of Things (IoT) devices. For energy efficiency reasons, LoRa end nodes implement a nonslotted ALOHA multiple access scheme to tran ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Critical node selection method for efficient Max-Pressure traffic signal control in large-scale congested networks

Nikolaos Geroliminis, Anastasios Kouvelas, Dimitrios Tsitsokas

Decentralized signal control of congested traffic networks based on the Max-Pressure (MP) controller is theoretically proven to maximize throughput, stabilize the system and balance queues for single intersections under specific conditions. However, its pe ...

2022

Hardware-Software Co-Design of an RPC Processor

Arash Pourhabibi Zarandi

The booming popularity of online services has led to a major evolution in the way these services are built and deployed. To cope with such online data-intensive services, service providers deploy several massive-scale datacenters, also referred to as wareh ...

EPFL2021

Low-Latency High-Bandwidth Circuit and System Design for Trigger Systems in High Energy Physics

Marcos Vinícius Silva Oliveira

The increasing luminosity in HEP (High Energy Physics) colliders demands trigger systems to be more selective. First, more information from the detector is routed to the trigger system. Second, larger parts of this information are processed together. These ...

EPFL2021

Operating System and Network Co-Design for Latency-Critical Datacenter Applications

Evangelos Marios Kogias

Datacenters are the heart of our digital lives. Online applications, such as social-networking and e-commerce, run inside datacenters under strict Service Level Objectives for their tail latency. Tight latency SLOs are necessary for such services to remain ...

EPFL2020

Optimus Prime: Accelerating Data Transformation in Servers

Babak Falsafi, Christoph Koch, Hussein Kassir, Mario Paulo Drumond Lages De Oliveira, Arash Pourhabibi Zarandi, Mark Johnathon Sutherland, Zilu Tian, Siddharth Gupta

Modern online services are shifting away from monolithic applications to loosely-coupled microservices because of their improved scalability, reliability, programmability and development velocity. Microservices communicating over the datacenter network req ...

ACM2020

Combining Dynamic & Static Scheduling in High-level Synthesis

Paolo Ienne, Lana Josipovic

A central task in high-level synthesis is scheduling: the allocation of operations to clock cycles. The classic approach to scheduling is static, in which each operation is mapped to a clock cycle at compile-time, but recent years have seen the emergence o ...

ASSOC COMPUTING MACHINERY2020

QUIC: Opportunities and threats in SATCOM

Ludovic Bernard Gérard Thomas, Emmanuel Qays Dubois

This article proposes a discussion on the strengths, weaknesses, opportunities and threats related to the deployment of QUIC end-to-end from a satellite-operator point-of-view. The deployment of QUIC is an opportunity for improving the quality of experienc ...

IEEE2020

Optimal Coordination of Phasor Data Concentrators in Hierarchical Synchrophasor Networks

Mario Paolone

Phasor data concentrators (PDCs) are essential functions in synchrophasor networks that collect and aggregate phasor measurement unit (PMU) data from across the electric grid. PDC buffers synchrophasor datasets during the “wait time” period, then communica ...

2020

Task scheduling for highly concurrent analytical and transaction workloads

Anastasia Ailamaki, Iraklis Psaroudakis

Systems and method for a task scheduler with dynamic adjustment of concurrency levels and task granularity are disclosed for improved execution of highly concurrent analytical and transactional systems. The task scheduler can avoid both over commitment and ...

2020

R2P2: Making RPCs first-class datacenter citizens

Adrien Ghosn, Edouard Bugnion, Georgios Prekas, Jonas Fietz, Evangelos Marios Kogias

Remote Procedure Calls are widely used to connect datacenter applications with strict tail-latency service level objectives in the scale of µs. Existing solutions utilize streaming or datagram-based transport protocols for RPCs that impose overheads and li ...

USENIX ASSOC2019

Destination buffer analysis for packets rejection obliteration in multi-channel networks

Georgia Fragkouli

In this paper we study a multi-channel network, each station of which is equipped with a network interface that has a receiver buffer of multiple packets. In this way, each station is able to receive multiple packets per time instant. We adopt a synchronou ...

2019