A Sequential High-Frequency Switched-Capacitor Neuro-Stimulation Technique with 77% Power Efficiency

This paper proposes a new energy-efficient technique for high-frequency switched-capacitor stimulation systems. The proposed sequential high-frequency switched-capacitor (S-HFSC) structure employs a two-step charge transfer technique to reduce the voltage drop across the switches and therefore, achieves a high power efficiency of 77%, without using any external off-chip component. Based on the proposed structure, a high-frequency switched-capacitor stimulation circuit with active charge balancing is designed and simulated in a standard 0.18 mu m CMOS process. Post-layout simulation results verify that the proposed structure achieves a peak power efficiency of 77%. Moreover, it occupies an area of 0.14 mm2.