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Asymmetrically strained all-silicon multi-gate n-Tunnel FETs

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Publications associées (40)

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In this letter, we characterize the electrical properties of commercial bulk 40-nm MOSFETs at room and deep cryogenic temperatures, with a focus on quantum information processing (QIP) applications. At 50 mK, the devices operate as classical FETs or quantu ...

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In this work we report the fabrication, co-integration and resulting performance of 2D/2D van der Waals (vdW) Vertical p-type Tunnel FETs and p-MOSFETs in a WSe2/SnSe2 material system. We demonstrate the best ever reported combined performance in terms of ...

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We propose and experimentally demonstrate double-gated n-type WSe 2 FETs with excellent top gate high-k dielectric layer. Under back gate control, the devices behave as n-type enhancement transistors, with ON/OFF current ratios larger than 6 orders of magn ...

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