Structural Rewriting in XOR-Majority Graphs

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Logic rewriting is a powerful optimization technique that replaces small sections of a Boolean network with better implementations. Typically, exact synthesis is used to compute optimum replacement on-the-fly, with possible support for Boolean don't cares. ...

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Typical operators for the decomposition of Boolean functions in state-of-the-art algorithms are AND, exclusive-OR (XOR), and the 2-to-1 multiplexer (MUX). We propose a logic decomposition algorithm that uses the majority-of-three (MAJ) operation. Such a de ...

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Staging has proved a successful technique for programmatically removing code abstractions, thereby allowing for faster program execution while retaining a high-level interface for the programmer. Unfortunately, techniques based on staging suffer from a num ...

Manipulating logic functions via majority operators recently drew the attention of researchers in computer science. For example, circuit optimization based on majority operators enables superior results as compared to traditional logic systems. Also, the B ...

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A Majority-Inverter Graph (MIG) is a recently introduced logic representation form whose algebraic and Boolean properties allow for efficient logic optimization. In particular, when considering logic depth reduction, MIG algorithms obtained signific ...

Structural Rewriting in XOR-Majority Graphs

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Scalable Logic Rewriting Using Don’t Cares

Orthologic with Axioms

LISA – A Modern Proof System

A Formal Framework for Maximum Error Estimation in Approximate Logic Synthesis

Equivalence Checking for Orthocomplemented Bisemilattices in Log-Linear Time

Further Results on Efficient Implementations of Block Cipher Linear Layers

Preserving Self-Duality During Logic Synthesis for Emerging Reconfigurable Nanotechnologies

Three-Input Gates for Logic Synthesis

Exact Synthesis of Majority-Inverter Graphs and Its Applications

Data Structures and Algorithms for Logic Synthesis in Advanced Technologies

A Novel Basis for Logic Rewriting

Advanced Functional Decomposition Using Majority and Its Applications

Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains

Programmable Logic Gates Based On Tunable Multistable Mechanisms

Busy Man’s Synthesis: Combinational Delay Optimization With SAT

Quoted Staged Rewriting: A Practical Approach to Library-Defined Optimizations

A Sound and Complete Axiomatization of Majority-n Logic

LUT-Based Hierarchical Reversible Logic Synthesis

Never Say Never Probabilistic & Temporal Failure Detectors

Optimizing Majority-Inverter Graphs with Functional Hashing