High aspect ratio sub-micron trenches on silicon-on-insulator and bulk silicon

This paper reports on the fabrication of sub-micron trenches on silicon-on-insulator (SOI) required in many MEMS devices and on bulk silicon. Trenches in the range of 100-500 nm had been etched with the deep reactive ion etching (DRIE) by using the SHARP (super high aspect ratio process) [1] optimized Bosch process with low frequency (LF) biased substrate. For comparison, the same trenches were etched with reactive ion etching (RIE) based on chlorine chemistry and with the radio frequency (RF) biased substrate DRIE SHARP optimized Bosch process. The comparison clearly illustrates the superiority of the LF biased substrate Bosch process. Aspect ratios of over 20 were achieved with nearly 90 angled and smooth sidewalls. It was found out that the scalloping effect got reduced by decreasing trench width. 200 nm and 150 nm comb-trenches with 200 nm and 150 nm spacing respectively and with an aspect ratio of over 20 were fabricated to demonstrate the controllability and repeatability of the trenches fabrication. (C) 2011 Elsevier B.V. All rights reserved.