A Fully-Digital Spectrum Shaping Signaling for Serial-Data Transceiver with Crosstalk and ISI Reduction Property in Multi-Drop Memory Interfaces

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A Real-Time Multi-Camera Depth Estimation ASIC with Custom On-Chip Embedded DRAM

Jonathan Emmanuel D Narinx

The capability to process high-resolution videos in real-time is becoming more important in a wide variety of applications such as autonomous vehicles, virtual reality or intelligent surveillance systems. The high-accuracy and complex video processing algo ...

EPFL2019

Analog Control of Retainable Resistance Multistates in HfO2 Resistive-Switching Random Access Memories (ReRAMs)

Yusuf Leblebici, Jury Sandrini, Elmira Shahrabi, Cecilia Giovinazzo

Resistive-switching random access memory (ReRAM) technologies are nowadays a good candidate to overcome the bottleneck of Von Neumann architectures, taking advantage of their logic-in-memory capability and the ability to mimic biological synapse behavior. ...

AMER CHEMICAL SOC2019

A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories

David Atienza Alonso, Pierre-Emmanuel Julien Marc Gaillardon, Marina Zapater Sancho, Xifan Tang, Yasir Mahmood Qureshi, Edouard Giacomin

The need for running complex Machine Learning (ML) algorithms, such as Convolutional Neural Networks (CNNs), in edge devices, which are highly constrained in terms of computing power and energy, makes it important to execute such applications efficiently. ...

2019

Quantitative relationships between SMAD dynamics and target gene activation kinetics in single live cells

Felix Naef, David Michael Suter, Torgil Elias Friman, Onur Tidin

The transduction of extracellular signals through signaling pathways that culminate in a transcriptional response is central to many biological processes. However, quantitative relationships between activities of signaling pathway components and transcript ...

Nature Research2019

DynaBurst: Dynamically Assemblying DRAM Bursts over a Multitude of Random Accesses

Paolo Ienne, Mikhail Asiatici

The effective bandwidth of the FPGA external memory, usually DRAM, is extremely sensitive to the access pattern. Nonblocking caches that handle thousands of outstanding misses (miss-optimized memory systems) can dynamically improve bandwidth utilization wh ...

IEEE2019

Multi-Tone Signaling and ADC-Based Digital Receiver for High-Speed Wireline Serial Links

Gain Kim

The exponential growth of Internet traffic and related demands for higher communication speed pushes processor-to-processor and processor-to-memory interconnects to provide further higher data-rate. Often time, processor-to-memory interconnectsâ speed is ...

EPFL2018

RRAM Crossbar Arrays for Storage Class Memory Applications : Throughput and Density Considerations

Alexandre Sébastien Julien Levisse

As more and more high density memories are required to satisfy the Internet of Things ecosystem, academics and industrials are looking for an intermediate solution to fill the gap between DRAM and Flash NAND in the memory hierarchy. The emergence of Resist ...

2018

Post-P&R Performance and Power Analysis for RRAM-based FPGAs

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang, Edouard Giacomin

Resistive Random Access Memory (RRAM)-based FPGAs are predicted to outperform conventional FPGAs architectures in area, delay and power over a wide range of voltage operations, allowing novel energy-quality trade-offs for reconfigurable computing. The oppo ...

2018

Design and Modeling of Serial Data Transceiver Architecture by Employing Multi-Tone Single-Sideband Signaling Scheme

Yusuf Leblebici, Gain Kim, Kiarash Gharibdoust, Chen Cao

This paper presents the design and analysis of a serial link transceiver (TRX) architecture employing analog multi-tone (AMT) signaling for chip-to-chip communication. Multi-tone single-sideband (SSB) signaling scheme is proposed in TRX architecture in ord ...

Ieee-Inst Electrical Electronics Engineers Inc2017

An Out-of-Order Load-Store Queue for Spatial Computing

Paolo Ienne, Philip Brisk, Lana Josipovic

The efficiency of spatial computing depends on the ability to achieve maximal parallelism. This necessitates memory interfaces that can correctly handle memory accesses that arrive in arbitrary order while still respecting data dependencies and ensuring ap ...

Assoc Computing Machinery2017

A System for Wireless Power Transfer and Data Communication of Long-Term Bio-Monitoring

Giovanni De Micheli, Sandro Carrara, Catherine Dehollain, Camilla Baj-Rossi, Francesca Stradolini, Seyedeh Sara Ghoreishizadeh, Cristina Boero, Enver Gürhan Kilinç, Franco Maloberti, Stefano Riario

A system for wireless power transfer and data communication of implantable bio-monitoring systems is presented. The proposed solution uses a servo-controlled power transmitter moved under the animal moving space. An x-y movable magnetic coil transmits the ...

Institute of Electrical and Electronics Engineers2015