Publication

Novel Configurable Logic Block Architecture Exploiting Controllable-Polarity Transistors, invited paper

2014
Conference Papers

Résumé

Controllable-polarity transistors exhibit a device-level configurability. Indeed, they can be dynamically configured between n- type and p-type. Such property can be exploited in Field Programmable Gate Arrays (FPGAs) to replace traditional Look-Up Tables (LUTs) by more powerful configurable units. We report here on a new FPGA logic block architecture, called MCluster, that takes a direct advantage of configurable transistors. The performance of the approach is evaluated and compared to its traditional Complementary Metal-Oxide- Semiconductor (CMOS) counterpart at 22-nm technology node. We note an average saving of 64% in area×delay×power product.

Source officielle

https://infoscience.epfl.ch/entities/publication/2f100fcd-670a-42fb-8e90-a79a563f6daa

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2014
Conference Papers

Résumé

Source officielle

https://infoscience.epfl.ch/entities/publication/2f100fcd-670a-42fb-8e90-a79a563f6daa

À propos de ce résultat

Concepts associés (32)

Reconfigurable computing

Reconfigurable computing is a computer architecture combining some of the flexibility of software with the high performance of hardware by processing with very flexible high speed computing fabrics like field-programmable gate arrays (FPGAs). The principal difference when compared to using ordinary microprocessors is the ability to make substantial changes to the datapath itself in addition to the control flow. On the other hand, the main difference from custom hardware, i.e.

Field-programmable gate array

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured after manufacturing. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools. FPGAs contain an array of programmable logic blocks, and a hierarchy of reconfigurable interconnects allowing blocks to be wired together.

Gate array

A gate array is an approach to the design and manufacture of application-specific integrated circuits (ASICs) using a prefabricated chip with components that are later interconnected into logic devices (e.g. NAND gates, flip-flops, etc.) according to custom order by adding metal interconnect layers in the factory. It was popular during the upheaval in the semiconductor industry in the 1980s, and its usage declined by the end of the 1990s.

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Publications associées (13)

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Novel Configurable Logic Block Architecture Exploiting Controllable-Polarity Transistors, invited paper

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Condition for the negative capacitance effect in metal–ferroelectric–insulator–semiconductor devices

Low Power FPGAs Based on Resistive Memories

Fault Modeling in Controllable Polarity Silicon Nanowire Circuits