Photon-Counting Arrays for Time-Resolved Imaging

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Most logic synthesis algorithms work on graph representations of logic functions with nodes associated with arbitrary logic expressions or simple logic functions and iteratively optimize such graphs. While recent multilevel logic synthesis efforts focused ...

Since their inception more than thirty years ago, field-programmable gate arrays (FPGAs) have been widely used to implement a myriad of applications from different domains. As a result of their low-level hardware reconfigurability, FPGAs have much faster d ...

Despite FPGAs rapidly evolving to support the requirements of the most demanding emerging applications, their high static power consumption, concentrated within the routing resources, still presents a major hurdle for low-power applications. Augmenting the ...

The research community has been making significant progress in hardware implementation, numerical computing and algorithm development for optimization-based control. However, there are two key challenges that still have to be overcome for optimization-base ...

III-N family of materials has offered multiple groundbreaking technologies in the field of optoelectronics and high-power radio-frequency (RF) devices. Blue light-emitting diodes (LEDs) have revolutionized low-energy lighting. Gallium nitride (GaN) RF mark ...

Joint Photographic Experts Group (JPEG) XS is a new International Standard from the JPEG Committee (formally known as ISO/International Electrotechnical Commission (IEC) JTC1/SC29/WG1). It defines an interoperable, visually lossless low-latency lightweight ...

Harnessing quantum randomness for the generation of random numbers is an important concept crucial for information security and many other computer-related applications. Quantum random number generators (QRNGs) are evolving from bulky, slow, and expensive ...

Even if Dennard scaling came to an end fifteen years ago, Moore' s law kept fueling an exponential growth in compute performance through increased parallelization. However, the performance of memory and, in particular, Dynamic Random Access Memory (DRAM), ...

True random number generators (TRNGs) allow the generation of true random bit sequences, guaranteeing the unpredictability and perfect balancing of the generated values. TRNGs can be realised from the sampling of quantum phenomena, for instance, the detect ...

The ever-growing global internet traffic has increased demand for higher speed data transmission. As the bandwidth requirements of wireline links increase, extensive digital equalization techniques are required to compensate for the high-frequency channel ...

Binary logic gates are building blocks of computing machines, in particular, electronic computers. One variant is the programable logic gate, also known as the reconfigurable logic gate, in which the logical function implemented can be modified. In this pa ...

At the FSE conference of ToSC 2018, Kranz et al. presented their results on shortest linear programs for the linear layers of several well known block ciphers in literature. Shortest linear programs are essentially the minimum number of 2-input xor gates r ...

Photon-Counting Arrays for Time-Resolved Imaging

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Three-Input Gates for Logic Synthesis

Synthesizing General-Purpose Code Into Dynamically Scheduled Circuits

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

Optimization Methods for Control: From Embedded Programmable Hardware to Data-Driven Process Optimization

Heterostructure design and field management in III-N high-electron mobility electronic devices

JPEG XS-A New Standard for Visually Lossless Low-Latency Lightweight Image Coding

Random flip-flop: adding quantum randomness to digital circuits for improved cyber security, artificial intelligence and more

Miss-Optimized Memory Systems: Turning Thousands of Outstanding Misses into Reuse Opportunities

Certification of the efficient random number generation technique based on single-photon detector arrays and time-to-digital converters

High-Speed ADC Design and Optimization for Wireline Links

Reconfigurable Logic Gates Based on Programable Multistable Mechanisms

Further Results on Efficient Implementations of Block Cipher Linear Layers