Highly Parallel RTL Simulation

Chattez avec Graph Search

Posez n’importe quelle question sur les cours, conférences, exercices, recherches, actualités, etc. de l’EPFL ou essayez les exemples de questions ci-dessous.

AVERTISSEMENT : Le chatbot Graph n'est pas programmé pour fournir des réponses explicites ou catégoriques à vos questions. Il transforme plutôt vos questions en demandes API qui sont distribuées aux différents services informatiques officiellement administrés par l'EPFL. Son but est uniquement de collecter et de recommander des références pertinentes à des contenus que vous pouvez explorer pour vous aider à répondre à vos questions.

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

For filling higher input voltage requirement, the input-series system based on attainable power devices is prevalent in industry. Specifically, its auxiliary power supply (APS) is self-powered from submodule (SM) capacitance on medium/high voltage occasion ...

Electronic devices play an irreplaceable role in our lives. With the tightening time to market, exploding demand for computing power, and continuous desire for smaller, faster, less energy-consuming, and lower-cost chips, computer-aided design for electron ...

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

Machine learning algorithms such as Convolutional Neural Networks (CNNs) are characterized by high robustness towards quantization, supporting small-bitwidth fixed-point arithmetic at inference time with little to no degradation in accuracy. In turn, small ...

Cloud computing environments increasingly provision field-programmable gate arrays (FPGAs) for their programmability and hardware-level parallelism. While FPGAs are typically used by one tenant at a time, multitenant schemes supporting spatial sharing of c ...

The desire and ability to place AI-enabled applications on the edge has grown significantly in recent years. However, the compute-, area-, and power-constrained nature of edge devices are stressed by the needs of the AI-enabled applications, due to a gener ...

Magnonics is a research field that has gained an increasing interest in both the fundamental and applied sciences in recent years. This field aims to explore and functionalize collective spin excitations in magnetically ordered materials for modern informa ...

Zoning reform is a crucial tool for cities to adapt to contemporary challenges. However, its implementation remains challenging. Property owners, with a vested interest in the value of their neighborhoods, are sensitive to local developments and the potent ...

Coarse-Grain Reconfigurable Arrays (CGRAs) represent emerging low-power architectures designed to accelerate Compute-Intensive Loops (CILs). The effectiveness of CGRAs in providing acceleration relies on the quality of mapping: how efficiently the CIL is c ...

Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher pow ...

Computer systems rely heavily on abstraction to manage the exponential growth of complexity across hardware and software. Due to practical considerations of compatibility between components of these complex systems across generations, developers have favou ...

Modern integrated circuits are tiny yet incredibly complex technological artifacts, composed of millions and billions of individual structures working in unison. Managing their complexity and facilitating their design drove part of the co-evolution of mode ...

Numerical simulations have become one of the key tools used by theorists in all the fields of astrophysics and cosmology. The development of modern tools that target the largest existing computing systems and exploit state-of-the-art numerical methods and ...

The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators. Specialized hardware has already redefine ...

The demise of Moore's Law and Dennard Scaling has revived interest in specialized computer architectures and accelerators. Verification and testing of this hardware depend heavily upon cycle-accurate simulation of register-transfer-level (RTL) designs. The ...

Today's continued increase in demand for processing power, despite the slowdown of Moore's law, has led to an increase in processor count, which has resulted in energy consumption and distribution problems. To address this, there is a growing trend toward ...

With Moore's law coming to an end, increasingly more hope is being put in specialized hardware implemented on reconfigurable architectures such as Field-Programmable Gate Arrays (FPGAs). Yet, it is often neglected that these architectures themselves experi ...

The miniaturization of integrated circuits (ICs) and their higher performance and energy efficiency, combined with new machine learning algorithms and applications, have paved the way to intelligent, interconnected edge devices. In the medical domain, they ...

Modern hardware is increasingly complex, requiring increasing effort to understand in order to carefully engineer systems for optimal performance and effective utilization. Moreover, established design principles and assumptions are not portable to modern ...

Highly Parallel RTL Simulation

Chattez avec Graph Search

EdgeAI-Aware Design of In-Memory Computing Architectures

Startup Analysis and Design of Self-Powered Auxiliary Power Supply in Input-Series System With Small Submodule Capacitance

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

DBFS: Dynamic Bitwidth-Frequency Scaling for Efficient Software-defined SIMD

X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don’t-Care Hardware Trojans to Shared Cloud FPGAs

Exploring High-Performance and Energy-Efficient Architectures for Edge AI-Enabled Applications

The 2024 Magnonics Roadmap

Spatial Modeling for Building Design Evaluation: from Visual Landscape Quality Assessment to Devaluation Risk Estimation

SAT-based Exact Modulo Scheduling Mapping for Resource-Constrained CGRAs

Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism

Secure Interface Design Leveraging Hardware/Software Support

Graph generative deep learning models with an application to circuit topologies

Swift : a modern highly parallel gravity and smoothed particle hydrodynamics solver for astrophysical and cosmological applications

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Manticore: Hardware-Accelerated RTL Simulation with Static Bulk-Synchronous Parallelism

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

Exploring brain-inspired multi-core heterogeneous hardware templates for low-power biomedical embedded systems

Chaosity: Understanding Contemporary NUMA-architectures