Posez n’importe quelle question sur les cours, conférences, exercices, recherches, actualités, etc. de l’EPFL ou essayez les exemples de questions ci-dessous.
AVERTISSEMENT : Le chatbot Graph n'est pas programmé pour fournir des réponses explicites ou catégoriques à vos questions. Il transforme plutôt vos questions en demandes API qui sont distribuées aux différents services informatiques officiellement administrés par l'EPFL. Son but est uniquement de collecter et de recommander des références pertinentes à des contenus que vous pouvez explorer pour vous aider à répondre à vos questions.
Turbo product codes have emerged as promising candidate channel codes for hyper-reliable low-latency communication scenarios owing to the inherent parallelism of product code decoding. Recently proposed product-coded MIMO systems with polar component codes demonstrate both performance gains and latency reductions compared to traditional 1-D coded systems. However, the existing successive cancellation list (SCL)-based decoding algorithm in polar-product-coded MIMO systems suffers from high memory costs due to storing internal LLRs and still exhibits potential for further performance improvements. To enhance the performance of product-coded MIMO systems and alleviate storage overhead, this paper investigates decoding schemes based on list ordered statistics decoding (List-OSD). A hardware-friendly soft-output computation method for List-OSD is proposed, which exploits both candidate codewords and pruned paths generated during decoding. Two soft-output list ordered statistics (SOLOS) decoding schemes are presented, respectively incorporating the Pyndiah method and the proposed soft-output computation technique. Simulation results show that the two proposed decoding schemes outperform conventional decoders across various code rates and constructions in product-coded MIMO systems. For the (64, 42)2 polar-product code, the proposed decoders with a list size of 32 achieve a 0.4 dB performance gain over the SCL-based decoder with a list size of 8 at comparable latency, while reducing the byte-level memory usage by 51.2%.