Reconfigurable logic circuit

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In this work, we develop timing-driven CAD support for FPGA architectures with direct connections between LUTs. We do so by proposing an efficient ILP-based detailed placer, which moves a carefully selected subset of LUTs from their original positions, so ...

Since their inception more than thirty years ago, field-programmable gate arrays (FPGAs) have been widely used to implement a myriad of applications from different domains. As a result of their low-level hardware reconfigurability, FPGAs have much faster d ...

The increasing luminosity in HEP (High Energy Physics) colliders demands trigger systems to be more selective. First, more information from the detector is routed to the trigger system. Second, larger parts of this information are processed together. These ...

The research community has been making significant progress in hardware implementation, numerical computing and algorithm development for optimization-based control. However, there are two key challenges that still have to be overcome for optimization-base ...

Even if Dennard scaling came to an end fifteen years ago, Moore' s law kept fueling an exponential growth in compute performance through increased parallelization. However, the performance of memory and, in particular, Dynamic Random Access Memory (DRAM), ...

Joint Photographic Experts Group (JPEG) XS is a new International Standard from the JPEG Committee (formally known as ISO/International Electrotechnical Commission (IEC) JTC1/SC29/WG1). It defines an interoperable, visually lossless low-latency lightweight ...

Despite FPGAs rapidly evolving to support the requirements of the most demanding emerging applications, their high static power consumption, concentrated within the routing resources, still presents a major hurdle for low-power applications. Augmenting the ...

The exponential growth in computing power and multimedia services has caused a tremendous increase in data traffic in recent years. This increase in data traffic brings a strong demand for data bandwidth of electrical input/output (I/O) links and pushes th ...

The growing importance of applications based on machine learning is driving the need to develop dedicated, energy-efficient electronic hardware. Compared with von Neumann architectures, which have separate processing and storage units, brain-inspired in-me ...

Binary logic gates are building blocks of computing machines, in particular, electronic computers. One variant is the programable logic gate, also known as the reconfigurable logic gate, in which the logical function implemented can be modified. In this pa ...

Deeply-scaled three-dimensional (3D) Multi-Processor Systems-on-Chip (MPSoCs) enable high performance and massive communication bandwidth for next-generation computing. However, as process nodes shrink, temperature-dependent leakage dramatically increases, ...

The time-reversal invariance is readily described and universally embodied in most laws of nature, either in a strict or in a soft sense. Based on this underlying physical principle, time-reversal theory has been theoretically and experimentally studied in ...

Reconfigurable logic circuit

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Detailed Placement for Dedicated LUT-Level FPGA Interconnect

Synthesizing General-Purpose Code Into Dynamically Scheduled Circuits

Low-Latency High-Bandwidth Circuit and System Design for Trigger Systems in High Energy Physics

Optimization Methods for Control: From Embedded Programmable Hardware to Data-Driven Process Optimization

Miss-Optimized Memory Systems: Turning Thousands of Outstanding Misses into Reuse Opportunities

JPEG XS-A New Standard for Visually Lossless Low-Latency Lightweight Image Coding

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

Energy-Efficient Design Techniques for High-Speed Wireline Serial Links

Logic-in-memory based on an atomically thin semiconductor

Reconfigurable Logic Gates Based on Programable Multistable Mechanisms

Towards Deeply Scaled 3D MPSoCs with Integrated Flow Cell Array Technology

Electromagnetic Time Reversal: Theory, Application to Fault Location in Power Networks and Experimental Validation