Publications associées à Parylene to silicon-nitride bonding for easy post-integration of high-pressure microfluidics to CMOS devices

Publications associées (19)

High-yield, wafer-scale fabrication of ultralow-loss, dispersion-engineered silicon nitride photonic circuits

Tobias Kippenberg, Junqiu Liu, Rui Ning Wang, Jijun He, Arslan Sajid Raja, Guanhao Huang, Nils Johan Engelsen, Tianyi Liu

Low-loss photonic integrated circuits and microresonators have enabled a wide range of applications, such as narrow-linewidth lasers and chip-scale frequency combs. To translate these into a widespread technology, attaining ultralow optical losses with est ...

Nature Research2021

Parallel convolutional processing using an integrated photonic tensor core

Xin Fu, Tobias Kippenberg, Junqiu Liu, Maxim Karpov, Arslan Sajid Raja, Anton Lukashchuk

With the proliferation of ultrahigh-speed mobile networks and internet-connected devices, along with the rise of artificial intelligence (AI)(1), the world is generating exponentially increasing amounts of data that need to be processed in a fast and effic ...

NATURE RESEARCH2021

Benefits and Challenges of Designing Cryogenic CMOS RF Circuits for Quantum Computers

Edoardo Charbon

Accurate and low-noise generation and amplification of microwave signals are required for the manipulation and readout of quantum bits (qubits). A fault-tolerant quantum computer operates at deep cryogenic temperatures (i.e.,

IEEE2019

Acoustic Actuation Of Suspended Graphene For Linear Excitation Of 2D Nems

Luis Guillermo Villanueva Torrijo, Muhammad Faizan, Marsha Mary Parmar

In this paper, we present the fabrication of on-chip piezoelectric acoustic actuation for 2D materials. Acoustic actuation is achieved at device level through patterning of aluminum nitride (AlN) thin film at wafer scale. Two piezoelectric stacks consistin ...

IEEE2019

III-Nitride Semiconductor Photonic Nanocavities on Silicon

Ian Michael Rousseau

Optical nanocavities enhance light-matter interaction due to their high quality factors (Q) and small modal volumes (V). The control of light-matter interaction lies at the heart of potential applications for integrated optical circuits, including optical ...

EPFL2018

Reconfigurable electronics based on metal-insulator transition : steep-slope switches and high frequency functions enabled by Vanadium Dioxide

Wolfgang Amadeus Vitale

The vast majority of disruptive innovations in science and technology has been originated from the discovery of a new material or the way its properties have been exploited to create novel devices and systems. New advanced nanomaterials will have a lasting ...

EPFL2016

Facile CO Cleavage by a Multimetallic CsU2 Nitride Complex

Rosario Scopelliti, Marinella Mazzanti, Marta Falcone

Uranium nitrides are important materials with potential for application as fuels for nuclear power generation, and as highly active catalysts. Molecular nitride compounds could provide important insight into the nature of the uranium–nitride bond, but curr ...

Wiley-VCH Verlag GmbH2016

RF Small-Signal and Noise Modeling Including Parameter Extraction of Nanoscale MOSFET From Weak to Strong Inversion

Christian Enz, Maria-Anna Chalkiadaki

The downscaling of CMOS processes has led to devices with an impressive RF performance. Advanced nanoscale RF MOSFETs present very high transit frequency, which can be traded off with lower power consumption, by shifting the operating point towards the wea ...

Institute of Electrical and Electronics Engineers2015

Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design

Giovanni De Micheli, Yusuf Leblebici, Andreas Peter Burg, Pierre-Emmanuel Julien Marc Gaillardon, Davide Sacchetto, Pascal Andreas Meinerzhagen

The total power budget of Ultra-Low Power (ULP) VLSI Systems-on-Chip (SoCs) is often dominated by the leakage power of embedded memories as well as status registers. On the one hand, supply voltage scaling down to the near-threshold (near-VT

Institute of Electrical and Electronics Engineers2014

Exploration of Sub-VT and Near-VT 2T Gain-Cell Memories for Ultra-Low Power Applications under Technology Scaling

Andreas Peter Burg, Adam Shmuel Teman, Pascal Andreas Meinerzhagen, Robert Giterman

Ultra-low power applications often require several kb of embedded memory and are typically operated at the lowest possible operating voltage (VDD) to minimize both dynamic and static power consumption. Embedded memories can easily dominate the overall sili ...

2013

Parylene to silicon nitride bonding for post-integration of high pressure microfluidics to CMOS devices

Martinus Adela Maria Gijs, Ata Tuna Ciftlik

High pressure-rated channels allow microfluidic assays to be performed on a smaller footprint while keeping the throughput, thanks to the higher enabled flow rates, opening perspectives for cost-effective integration of CMOS chips to microfluidics circuits ...

Royal Society of Chemistry2012

Offset And Drift Analysis Of The Hall Effect Sensors. The Geometrical Parameters Influence

Maher Kayal, Jean-Michel Sallese, Maria-Alexandra Paun

Several Hall sensor configurations have been integrated in CMOS 0.35 mu m technology and analyzed in terms of offset at room temperature and offset drift. We searched for the best geometry that would minimize the offset and its corresponding drift. The tar ...

Inst Materials Physics2012

K-band single-chip electron spin resonance detector

Jens Anders

We report on the design, fabrication, and characterization of an integrated detector for electron spin resonance spectroscopy operating at 27 GHz. The microsystem, consisting of an LC-oscillator and a frequency division module, is integrated onto a single ...

Academic Press Inc - Elsevier Science2012

Geometry influence on the Hall effect devices performance

Maher Kayal, Jean-Michel Sallese, Maria-Alexandra Paun

The influence of the geometry, via the ratio L/W of the Hall cells and the geometrical correction factor G on several figures of merit regarding Hall sensors is analyzed, namely the sensitivity, Hall Voltage and power dissipated within the device. Experime ...

2010

Optimization of the wire grid size for differential routing: Analysis and impact on the power-delay-area tradeoff

Yusuf Leblebici

In this paper, the impact of the wire grid size on the power-delay-area trade off of VLSI digital circuits with differential routing is analyzed. To this aim, the differential MOS current-mode logic (MCML) is adopted as reference logic style, and a complet ...

Elsevier2010

A Low-Noise CMOS Receiver Frontend for NMR-based Surgical Guidance

Giovanni Boero, Jens Anders

In this paper a novel architecture for an integrated NMR receiver front-end for surgical guidance applications is described. While the chip consumes only 9 mA supply current from a 3.3 V power supply it has a measured input referred noise density of 0.7 nV ...

Springer, 233 Spring Street, New York, Ny 10013, United States2009

Subthreshold Leakage Reduction: A Comparative Study of SCL and CMOS Design

Yusuf Leblebici, Seyed Armin Tajalli

The large subthreshold leakage current of static CMOS logic circuits designed in modern nanometer-scale technologies is one of the main barriers for implementing ultra-low power digital systems. Subthreshold source-coupled logic (STSCL) circuits are based ...

IEEE2009

Full-wafer fabrication by nanostencil lithography of micro/nanomechanical mass sensors monolithically integrated with CMOS

Jürgen Brugger, Marc Antonius Friedrich van den Boogaart

Wafer-scale nanostencil lithography (nSL) is used to define several types of silicon mechanical resonators, whose dimensions range from 20 μm down to 200 nm, monolithically integrated with CMOS circuits. We demonstrate the simultaneous patterning by nSL of ...

2008

Ultra-thin nanograin polysilicon devices for hybrid CMOS-NANO integrated circuits

Serge Ecoffey

The aim of this research is to develop and to evaluate devices and circuits performances based on ultrathin nanograin polysilicon wire (polySiNW) dedicated to room temperature operated hybrid CMOS-"nano" integrated circuits. The proposed polySiNW device is ...

EPFL2007