Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells

Chattez avec Graph Search

Posez n’importe quelle question sur les cours, conférences, exercices, recherches, actualités, etc. de l’EPFL ou essayez les exemples de questions ci-dessous.

AVERTISSEMENT : Le chatbot Graph n'est pas programmé pour fournir des réponses explicites ou catégoriques à vos questions. Il transforme plutôt vos questions en demandes API qui sont distribuées aux différents services informatiques officiellement administrés par l'EPFL. Son but est uniquement de collecter et de recommander des références pertinentes à des contenus que vous pouvez explorer pour vous aider à répondre à vos questions.

Novel applications have triggered significant changes at the system level of FPGA architecture design, such as the introduction of embedded VLIW processor arrays and hardened NoCs. However, the routing architecture of the soft logic fabric has largely rema ...

Threshold Implementations have become a popular generic technique to construct circuits resilient against power analysis attacks.In this paper, we look to devise efficient threshold circuits for the lightweight block cipher family SKINNY. The only threshol ...

Despite FPGAs rapidly evolving to support the requirements of the most demanding emerging applications, their high static power consumption, concentrated within the routing resources, still presents a major hurdle for low-power applications. Augmenting the ...

True random number generators (TRNGs) allow the generation of true random bit sequences, guaranteeing the unpredictability and perfect balancing of the generated values. TRNGs can be realised from the sampling of quantum phenomena, for instance, the detect ...

Programmable photonic integrated circuits are emerging as an attractive platform for applications such as quantum information processing and artificial neural networks. However, current programmable circuits are limited in scalability by the lack of low-po ...

Binary logic gates are building blocks of computing machines, in particular, electronic computers. One variant is the programable logic gate, also known as the reconfigurable logic gate, in which the logical function implemented can be modified. In this pa ...

The time-reversal invariance is readily described and universally embodied in most laws of nature, either in a strict or in a soft sense. Based on this underlying physical principle, time-reversal theory has been theoretically and experimentally studied in ...

The growing importance of applications based on machine learning is driving the need to develop dedicated, energy-efficient electronic hardware. Compared with von Neumann architectures, which have separate processing and storage units, brain-inspired in-me ...

Deeply-scaled three-dimensional (3D) Multi-Processor Systems-on-Chip (MPSoCs) enable high performance and massive communication bandwidth for next-generation computing. However, as process nodes shrink, temperature-dependent leakage dramatically increases, ...

Binary logic operations are the building blocks of computing machines. In this paper, we present a new programmable binary logic gate based on programmable multistable mechanisms (PMM), which are multistable structures whose stability behavior depends on m ...

Low-inertia grids are characterized by high shares of harmonic and inter-harmonic distortion, produced by the inverters that interface non-conventional generation assets to the electrical grid. These interfering tones largely compromise synchrophasor estim ...

The present invention relates to a reconfigurable logic circuit comprising - a first, second and third switching circuit arranged for receiving a first input bit, a second input bit and a third input bit, respectively, and each arranged for being configure ...

This work presents a technique to produce random bits by exploiting single-photon time of arrival. Two quantum random number generator (QRNG) devices based on the field programmable gate array (FPGA) technology are presented: Randy, which uses one discrete ...

Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells

Chattez avec Graph Search

NetCracker: A Peek into the Routing Architecture of Xilinx 7-Series FPGAs

Improving First-Order Threshold Implementations of SKINNY

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

Certification of the efficient random number generation technique based on single-photon detector arrays and time-to-digital converters

Silicon photonic microelectromechanical phase shifters for scalable programmable photonics

Reconfigurable Logic Gates Based on Programable Multistable Mechanisms

Electromagnetic Time Reversal: Theory, Application to Fault Location in Power Networks and Experimental Validation

Logic-in-memory based on an atomically thin semiconductor

Towards Deeply Scaled 3D MPSoCs with Integrated Flow Cell Array Technology

Programmable Logic Gates Based On Tunable Multistable Mechanisms

Design and experimental validation of an FPGA-based PMU simultaneously compliant with P and M performance classes

Reconfigurable logic circuit

Efficient random number generation techniques for CMOS single-photon avalanche diode array exploiting fast time tagging units