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Mathias Soeken

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Publications associées (81)

Exact Synthesis of Majority-Inverter Graphs and Its Applications

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

We propose effective algorithms for exact synthesis of Boolean logic networks using satisfiability modulo theories (SMT) solvers. Since exact synthesis is a difficult problem, it can only be applied efficiently to very small functions, having up to 6 varia ...

Ieee-Inst Electrical Electronics Engineers Inc2017

Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains

Paolo Ienne, Giovanni De Micheli, Ana Petkovska, Grace Zgheib, Luca Gaetano Amarù, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Zhufei Chu

Hard-wired carry chains in FPGAs are designed to improve efficiency of important arithmetic primitives. Although they are proven to be effective for arithmetic-rich functions, there are very few studies on the optimization opportunities of carry chains for ...

ACM2017

Wave Pipelining for Majority-based Beyond-CMOS Technologies

Giovanni De Micheli, Luca Gaetano Amarù, Odysseas Zografos, Pierre-Emmanuel Julien Marc Gaillardon, Eleonora Testa, Mathias Soeken

The performance of some emerging nanotechnolo- gies benefits from wave pipelining. The design of such circuits re- quires new models and algorithms. Thus we show how Majority- Inverter Graphs (MIG) can be used for this purpose and we extend the related opt ...

2017

A Compiler for Parallel and Resource-Constrained Programmable in-Memory Computing

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Giulia Meuli, Mathias Soeken

Solid-state resistive switches have recently enabled low-power, scalable, non-volatile memories. Their proven intrinsic logic operation, allowing design of in-memory computing systems, attracted the attention of the research community. A Programmable Logic ...

2017

Exact Synthesis for Logic Synthesis Applications with Complex Constraints

Giovanni De Micheli, Odysseas Zografos, Eleonora Testa, Mathias Soeken

Exact synthesis is the problem of finding logic networks that represent given Boolean functions and respect given constraints. With exact synthesis it is possible to find optimum networks, e.g., in size or depth; consequently, it primarily finds applicatio ...

2017

Hierarchical Reversible Logic Synthesis Using LUTs

Giovanni De Micheli, Mathias Soeken

Today's rapid advances in the physical implementation of quantum computers demand for scalable synthesis methods in order to map practical logic designs to quantum architectures. We present a synthesis algorithm for quantum computing based on k-LUT network ...

IEEE2017

RM3 based logic synthesis

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

In-memory computing devices, such as resistive RAMs, natively implement material implication or a variant of the majority-of-three operation called RM3. This operation generalizes material implication and has been used as target operation in sev ...

IEEE2017

SAT-Based Combinational and Sequential Dependency Computation

Giovanni De Micheli, Mathias Soeken

We present an algorithm for computing both functional dependency and unateness of combinational and sequential Boolean func- tions represented as logic networks. The algorithm uses SAT-based tech- niques from Combinational Equivalence Checking (CEC) ...

Springer2016

An MIG-based Compiler for Programmable Logic-in-Memory Architectures

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

Resistive memories have gained high research attention for enabling design of in-memory computing circuits and systems. We propose for the first time an automatic compilation methodology suited to a recently proposed computer architecture solely based on r ...

Ieee2016

A Fast Symbolic Transformation Based Algorithm for Reversible Logic Synthesis

Mathias Soeken

We present a more concise formulation of the transformation based synthesis approach for reversible logic synthesis, which is one of the most prominent explicit ancilla-free synthesis approaches. Based on this formulation we devise a symbolic variant of th ...

Springer Int Publishing Ag2016

Notes on Majority Boolean Algebra

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Anupam Chattopadhyay, Mathias Soeken

A Majority-Inverter Graph (MIG) is a homogeneous logic network, where each node represents the majority function. Recently, a logic optimization package based on the MIG data-structure, with 3-input majority node (M3) has been proposed [2], [30]. It is dem ...

IEEE2016

Enumeration of reversible functions and its application to circuit complexity

Giovanni De Micheli, Nabila Abdessaied, Mathias Soeken

We review combinational results to enumerate and classify reversible functions and investigate the application to circuit complexity. In particularly, we consider the effect of negating and permuting input and output variables and the effect of applying li ...

Springer2016

Fast generation of lexicographic satisfiable assignments: enabling canonicity in SAT-based applications

Paolo Ienne, Giovanni De Micheli, Ana Petkovska, Mathias Soeken

Lexicographic Boolean satisfiability (LEXSAT) is a variation of the Boolean satisfiability problem (SAT). Given a variable order, LEXSAT finds a satisfying assignment whose integer value under the given variable order is minimum (maximum) among all satisfi ...

Assoc Computing Machinery2016

Approximation-aware Rewriting of AIGs for Error Tolerant Applications

Arun Chandrasekharan, Mathias Soeken

Approximation circuits offer superior performance (speed and area) compared to traditional circuits at the cost of computational accuracy. The accuracy of the results in approximation circuits is evaluated based on several error metrics such as worst-case ...

Assoc Computing Machinery2016

Multilevel Design Understanding: From Specification to Logic Invited Paper

Mathias Soeken

We present an outline of the field of Multilevel Design Understanding by first defining and motivating the related problems, and then describing the key issues which must be addressed in future research. ...

Assoc Computing Machinery2016

Optimizing Majority-Inverter Graphs with Functional Hashing

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

A Majority-Inverter Graph (MIG) is a recently introduced logic representation form whose algebraic and Boolean properties allow for efficient logic optimization. In particular, when considering logic depth reduction, MIG algorithms obtained signific ...

IEEE2016

Inversion optimization in majority-inverter graphs

Giovanni De Micheli, Luca Gaetano Amarù, Odysseas Zografos, Pierre-Emmanuel Julien Marc Gaillardon, Eleonora Testa, Mathias Soeken

Many emerging nanotechnologies realize majority gates as primitive building blocks and they benefit from a majority-based synthesis. Recently, Majority-Inverter Graphs (MIGs) have been introduced to abstract these new technologies. We present optimi ...

Ieee2016

Multi-Objective BDD Optimization for RRAM based Circuit Design

Mathias Soeken

Resistive switching property enables various promising applications such as design of non-volatile in-memory computing devices which has attracted high attention to Resistive Random Access Memories (RRAMs). In this work, we present a multi-objective BDD op ...

IEEE2016

Approximate BDD Optimization with Prioritized epsilon-Preferred Evolutionary Algorithm

Mathias Soeken

Approximate computing has gained high attention in various applications that can benefit from a reduction in costs by lowering the accuracy. In this paper we present an optimization approach for functional approximation of Binary Decision Diagrams (BDDs) w ...

Assoc Computing Machinery2016

Fast Hierarchical NPN Classification

Paolo Ienne, Giovanni De Micheli, Ana Petkovska, Mathias Soeken

Classifying functions according to some common properties into libraries of functions is an important step in many logic synthesis and technology mapping algorithms used in FPGA design flows. NPN classification is one of the frequently used classifications ...

IEEE2016

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