William Andrew Simon

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With the spread of cloud services and Internet of Things concept, there is a popularization of machine learning and artificial intelligence based analytics in our everyday life. However, an efficient deployment of these data-intensive services requires per ...

The increasing ubiquity of edge devices in the consumer market, along with their ever more computationally expensive workloads, necessitate corresponding increases in computing power to support such workloads. In-memory computing is attractive in edge devi ...

Utilization of edge devices has exploded in the last decade, with such use cases as wearable devices, autonomous driving, and smart homes. As their ubiquity grows, so do expectations of their capabilities. Simultaneously, their formfactor and use cases lim ...

Hybrid caches consisting of both SRAM and emerging Non-Volatile Random Access Memory (eNVRAM) bitcells increase cache capacity and reduce power consumption by taking advantage of eNVRAM's small area footprint and low leakage energy. However, they also inhe ...

The rapid expansion of online-based services requires novel energy and performance efficient architectures to meet power and latency constraints. Fast architectural exploration has become a key enabler in the proposal of architectural innovation. In this p ...

In-Memory Computing (IMC) solutions, and particularly bitline computing in SRAM, appear promising as they mitigate one of the most energy consuming aspects in computation: data movement. In this work we propose a fast (2.4Ghz for bitwise operations and 2.4 ...

The increasing adoption of smart systems in our daily life has led to the development of new applications with varying performance and energy constraints, and suitable computing architectures need to be developed for these new applications. In this paper, ...

Edge devices must support computationally demanding algorithms, such as neural networks, within tight area/energy budgets. While approximate computing may alleviate these constraints, limiting induced errors remains an open challenge. In this paper, we pro ...

The design of new streaming systems is becoming a major area of research to deploy services targeted in the Internet-of-Things (IoT) era. In this context, the new High Efficiency Video Coding (HEVC) standard provides high efficiency and scalability of qual ...

With the surge in complexity of edge workloads, it appeared in the scientific community that such workloads cannot be anymore overflown to the cloud due to the huge edge device to server communication energy cost and the high energy consumption induced in ...

The HyperDimensional Computing (HDC) Machine Learning (ML) paradigm is highly interesting for applications involving continuous, semi-supervised learning for long-term monitoring. However, its accuracy is not yet on par with other ML approaches, necessitat ...

A random access memory having a memory array having a plurality of local memory groups, each local memory group including a plurality of bitcells arranged in a bitcell column, a pair of local bitlines operatively connected to the plurality of bitcells, a p ...

Area and power constrained edge devices are increasingly utilized to perform compute intensive workloads, necessitating increasingly area and power efficient accelerators. In this context, in-SRAM computing performs hundreds of parallel operations on spati ...

William Andrew Simon

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An Associativity-Agnostic in-Cache Computing Architecture Optimized for Multiplication

BLADE: A BitLine Accelerator for Devices on the Edge

In-Memory Hardware and Architectural Extensions for Workloads Acceleration

A Hybrid Cache HW/SW Stack for Optimizing Neural Network Runtime, Power and Endurance

Gem5-X: A Gem5-Based System Level Simulation Framework to Optimize Many-Core Platforms

A Fast, Reliable and Wide-voltage-range In-memory Computing Architecture

Gem5-X : A Many-Core Heterogeneous Simulation Platform for Architectural Exploration and Optimization

Exact Neural Networks from Inexact Multipliers via Fibonacci Weight Encoding

A Machine Learning-Based Strategy for Efficient Resource Management of Video Encoding on Heterogeneous MPSoCs

Functionality Enhanced Memories for Edge-AI Embedded Systems

HDTorch: Accelerating Hyperdimensional Computing with GP-GPUs for Design Space Exploration

Memory chip or memory array for wide-voltage range in-memory computing using bitline technology

Blade: An in-Cache Computing Architecture for Edge Devices