Recherche

Afficher tous les résultats pour

Accueil

Personne

Boris Robert Grot

Cette personne a quitté l’EPFL

À propos
Confidentialité
Mentions légales

Graph Chatbot

Publications associées (28)

Page 1 sur 2

Meet the Walkers: Accelerating Index Traversals for In-Memory Databases

Babak Falsafi, Boris Robert Grot, Javier Picorel Obando, Yusuf Onur Koçberber

The explosive growth in digital data and its growing role in real-time decision support motivate the design of high-performance database management systems (DBMSs). Meanwhile, slowdown in supply voltage scaling has stymied improvements in core performance ...

2013

Manycore Network Interfaces for In-Memory Rack-Scale Computing

Babak Falsafi, Edouard Bugnion, Boris Robert Grot, Alexandros Daglis, Stanko Novakovic

Datacenter operators rely on low-cost, high-density technologies to maximize throughput for data-intensive services with tight tail latencies. In-memory rack-scale computing is emerging as a promising paradigm in scale-out datacenters capitalizing on commo ...

2015

Scale-Out Processors

Babak Falsafi, Boris Robert Grot, Javier Picorel Obando, Yusuf Onur Koçberber, Stavros Volos, Dorde Jevdic, Pejman Lotfi Kamran, Michael Ferdman, Al Mutaz Adileh

Scale-out datacenters mandate high per-server throughput to get the maximum benefit from the large TCO investment. Emerging applications (e.g., data serving and web search) that run in these datacenters operate on vast datasets that are not accommodated by ...

Ieee2012

NOC-Out: Microarchitecting a Scale-Out Processor

Babak Falsafi, Boris Robert Grot, Pejman Lotfi Kamran

Scale-out server workloads benefit from many-core processor organizations that enable high throughput thanks to abundant request-level parallelism. A key characteristic of these workloads is the large instruction footprint that exceeds the capacity of priv ...

2012

Mitigating Load Imbalance in Distributed Data Serving with Rack-Scale Memory Pooling

Babak Falsafi, Edouard Bugnion, Boris Robert Grot, Alexandros Daglis, Stanko Novakovic, Dmitrii Ustiugov

To provide low-latency and high-throughput guarantees, most large key-value stores keep the data in the memory of many servers. Despite the natural parallelism across lookups, the load imbalance, introduced by heavy skew in the popularity distribution of k ...

2019

Scale-Out NUMA

Babak Falsafi, Edouard Bugnion, Boris Robert Grot, Alexandros Daglis, Stanko Novakovic

Emerging datacenter applications operate on vast datasets that are kept in DRAM to minimize latency. The large number of servers needed to accommodate this massive memory footprint requires frequent server-to-server communication in applications such as ke ...

2014

Prefetched Address Translation

Edouard Bugnion, Boris Robert Grot, Dmitrii Ustiugov

With explosive growth in dataset sizes and increasing machine memory capacities, per-application memory footprints are commonly reaching into hundreds of GBs. Such huge datasets pressure the TLB, resulting in frequent misses that must be resolved through a ...

ASSOC COMPUTING MACHINERY2019

Unified prefetching into instruction cache and branch target buffer

Babak Falsafi, Boris Robert Grot, Ilknur Cansu Kaynak

A system and method of coupling a Branch Target Buffer (BTB) content of a BTB with an instruction cache content of an instruction cache. The method includes: tagging a plurality of target buffer entries that belong to branches within a same instruction blo ...

2017

BuMP: Bulk Memory Access Prediction and Streaming

Babak Falsafi, Boris Robert Grot, Javier Picorel Obando, Stavros Volos

With the end of Dennard scaling, server power has emerged as the limiting factor in the quest for more capable datacenters. Without the benefit of supply voltage scaling, it is essential to lower the energy per operation to improve server efficiency. As th ...

2014

CCNoC: Specializing On-Chip Interconnects for Energy Efficiency in Cache-Coherent Servers

Giovanni De Micheli, Babak Falsafi, Boris Robert Grot, Ciprian Seiculescu, Stavros Volos, Naser Khosro Pour

Manycore chips are emerging as the architecture of choice to provide power efficiency and improve performance, while riding Moore’s Law. In these architectures, on-chip interconnects play a pivotal role in ensuring power and performance scalability. As sup ...

2012

Stretch: Balancing QoS and Throughput for Colocated Server Workloads on SMT Cores

Boris Robert Grot, Siddharth Gupta

In a drive to maximize resource utilization, today's datacenters are moving to colocation of latency-sensitive and batch workloads on the same server. State-of-the-art deployments, such as those at Google, colocate such diverse workloads even on a single S ...

IEEE2019

Scale-out non-uniform memory access

Babak Falsafi, Edouard Bugnion, Boris Robert Grot, Alexandros Daglis, Stanko Novakovic

A computing system that uses a Scale-Out NUMA (“soNUMA”) architecture, programming model, and/or communication protocol provides for low-latency, distributed in-memory processing. Using soNUMA, a programming model is layered directly on top of a NUMA memor ...

2015

Spatial Locality Speculation to Reduce Energy in Chip-Multiprocessor Networks-on-Chip

Boris Robert Grot

As processor chips become increasingly parallel, an efficient communication substrate is critical for meeting performance and energy targets. In this work, we target the root cause of network energy consumption through techniques that reduce link and route ...

Institute of Electrical and Electronics Engineers2014

The Mondrian Data Engine

Babak Falsafi, Boris Robert Grot, Javier Picorel Obando, Alexandros Daglis, Mario Paulo Drumond Lages De Oliveira, Dmitrii Ustiugov, Nooshin Sadat Mirzadeh

The increasing demand for extracting value out of ever-growing data poses an ongoing challenge to system designers, a task only made trickier by the end of Dennard scaling. As the performance density of traditional CPU-centric architectures stagnates, adva ...

2017

Confluence: unified instruction supply for scale-out servers

Babak Falsafi, Boris Robert Grot, Ilknur Cansu Kaynak

Multi-megabyte instruction working sets of server workloads defy the capacities of latency-critical instruction-supply components of a core; the instruction cache (L1-I) and the branch target buffer (BTB). Recent work has proposed dedicated prefetching tec ...

ACM Press2015

Benchmarking, Analysis, and Optimization of Serverless Function Snapshots

Edouard Bugnion, Boris Robert Grot, Evangelos Marios Kogias, Dmitrii Ustiugov

Serverless computing has seen rapid adoption due to its high scalability and flexible, pay-as-you-go billing model. In serverless, developers structure their services as a collection of functions, sporadically invoked by various events like clicks. High in ...

2021

An Analysis of Load Imbalance in Scale-out Data Serving

Babak Falsafi, Edouard Bugnion, Boris Robert Grot, Alexandros Daglis, Stanko Novakovic

Despite the natural parallelism across lookups, performance of distributed key-value stores is often limited due to load imbalance induced by heavy skew in the popularity distribution of the dataset. To avoid violating service level objectives expressed in ...

2016

Network-on-chip using request and reply trees for low-latency processor-memory communication

Babak Falsafi, Boris Robert Grot

A Network-On-Chip (NOC) organization comprises a die having a cache area and a core area, a plurality of core tiles arranged in the core area in a plurality of subsets, at least one cache memory bank arranged in the cache area, whereby the at least one cac ...

2014

Fat Caches For Scale-Out Servers

Babak Falsafi, Boris Robert Grot, Stavros Volos, Dorde Jevdic

The authors propose a high-capacity cache architecture that leverages emerging high-bandwidth memory modules. High-capacity caches capture the secondary data working sets of scale-out workloads while uncovering significant spatiotemporal locality across da ...

Institute of Electrical and Electronics Engineers2017

SABRes: Atomic Object Reads for In-Memory Rack-Scale Computing

Babak Falsafi, Edouard Bugnion, Boris Robert Grot, Alexandros Daglis, Stanko Novakovic, Dmitrii Ustiugov

Modern in-memory services rely on large distributed object stores to achieve the high scalability essential to service thousands of requests concurrently. The independent and unpredictable nature of incoming requests results in random accesses to the objec ...

Ieee2016