Publications de Mirjana Stojilovic

Publications associées (39)

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

Mirjana Stojilovic, Dina Gamaleldin Ahmed Shawky Mahmoud

Field-programmable gate arrays (FPGAs) combine hardware reconfigurability with a high degree of parallelism. Consequently, FPGAs offer performance gains and power savings for many applications. A recent trend has been to leverage the hardware versatility o ...

2022

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs

Mathias Josef Payer, Mirjana Stojilovic, Ognjen Glamocanin, Shashwat Shrivastava

Side-channel disassembly attacks recover CPU instructions from power or electromagnetic side-channel traces measured during code execution. These attacks typically rely on physical access, proximity to the victim device, and high sampling rate measuring in ...

2023

Protection Strategy against IEMI for Wireless Communication Infrastructures

Farhad Rachidi-Haeri, Marcos Rubinstein, Nicolas Mora Parra, Mirjana Stojilovic

In this paper, we present a methodology for estimating the protection levels of critical equipment against IEMI. We apply the method to a wireless communication infrastructure, but it can be applied to any critical infrastructure. The required protection l ...

Ieee2016

Selective Flexibility: Creating Domain-Specific Reconfigurable Arrays

Paolo Ienne, Philip Brisk, Mirjana Stojilovic, David Novo Bruna

Historically, hardware acceleration technologies have either been application-specific, therefore lacking in flexibility, or fully programmable, thereby suffering from notable inefficiencies on an application-by-application basis. To address the growing ne ...

Institute of Electrical and Electronics Engineers2013

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs

Mathias Josef Payer, Mirjana Stojilovic, Ognjen Glamocanin, Shashwat Shrivastava

This repository contains the design files and software required to reproduce the results in the paper "Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs" by Ognjen Glamocanin, Shashwat Shrivastava, Jinwei Yao, Nour A ...

EPFL Infoscience2023

X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don’t-Care Hardware Trojans to Shared Cloud FPGAs

Mirjana Stojilovic, Dina Gamaleldin Ahmed Shawky Mahmoud, Beatrice Shokry Samir Shokry

Cloud computing environments increasingly provision field-programmable gate arrays (FPGAs) for their programmability and hardware-level parallelism. While FPGAs are typically used by one tenant at a time, multitenant schemes supporting spatial sharing of c ...

2024

Practical Implementations of Remote Power Side-Channel and Fault-Injection Attacks on Multitenant FPGAs

Francesco Regazzoni, Mirjana Stojilovic, Ognjen Glamocanin, Dina Gamaleldin Ahmed Shawky Mahmoud

Cloud computing environments increasingly provision FPGAs because of their fine-grained, highly parallel, and flexible hardware architecture. The availability of FPGAs in the cloud fueled research on the security risks associated with exposing FPGA fabric ...

Springer, Cham2023

Lightning Location Systems and Interstroke Intervals: Effects of Imperfect Detection Efficiency

Farhad Rachidi-Haeri, Marcos Rubinstein, Mohammad Azadifar, Mirjana Stojilovic

Lightning location systems (LLSs) are often used to obtain parameters of lightning flashes. However, the imperfect detection efficiency (DE) of these systems affects the accuracy of the results. In this paper, we focus on the effects of the imperfect DE on ...

Ieee2016

NetCracker: A Peek into the Routing Architecture of Xilinx 7-Series FPGAs

Mirjana Stojilovic, Stefan Nikolic

Novel applications have triggered significant changes at the system level of FPGA architecture design, such as the introduction of embedded VLIW processor arrays and hardened NoCs. However, the routing architecture of the soft logic fabric has largely rema ...

2021

Are Cloud FPGAs Really Vulnerable to Power Analysis Attacks?

Francesco Regazzoni, Mirjana Stojilovic, Ognjen Glamocanin, Louis Coulon

Recent works have demonstrated the possibility of extracting secrets from a cryptographic core running on an FPGA by means of remote power analysis attacks. To mount these attacks, an adversary implements a voltage fluctuation sensor in the FPGA logic, rec ...

IEEE2020

Timing Violation Induced Faults in Multi-Tenant FPGAs

Mirjana Stojilovic, Dina Gamaleldin Ahmed Shawky Mahmoud

FPGAs have made their way into the cloud, allowing users to gain remote access to the state-of-the-art reconfigurable fabric and implement their custom accelerators. Since FPGAs are large enough to accommodate multiple independent designs, the multi-tenant ...

IEEE2019

Parallel FPGA routing: Survey and challenges

Mirjana Stojilovic

As transistor scaling is slowing down [1], other opportunities for ensuring continuous performance increase have to be explored. Field programmable gate arrays (FPGAs) are in the spotlight these days: not only due to their malleability and energy efficienc ...

2017

Temperature Impact on Remote Power Side-Channel Attacks on Shared FPGAs

Mathias Josef Payer, Mirjana Stojilovic, Ognjen Glamocanin

To answer the growing demand for hardware acceleration, Amazon, Microsoft, and many other major cloud service providers have included field-programmable gate arrays (FPGAs) in their datacenters. However, researchers have shown that cloud FPGAs, when shared ...

IEEE2023

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

Mirjana Stojilovic

Despite FPGAs rapidly evolving to support the requirements of the most demanding emerging applications, their high static power consumption, concentrated within the routing resources, still presents a major hurdle for low-power applications. Augmenting the ...

2021

Deterministic Parallel Routing for FPGAs based on Galois Parallel Execution Model

Philip Brisk, Mirjana Stojilovic

This paper describes a deterministic and parallel implementation of the VPR routability-driven router for FPGAs. We considered two parallefization strategies: (1) routing multiple nets in parallel; and (2) routing one net at a time, while parallelizing the ...

IEEE2018

Physical Side-Channel Attacks and Covert Communication on FPGAs: A Survey

Mirjana Stojilovic, Seyedeh Sharareh Mirzargar

Field-programmable gate arrays (FPGAs) are, like CPUs, susceptible to side-channel information leakage and covert communication. The malleability of FPGAs enables users to create and control physical effects, and sense and measure the consequences. With FP ...

IEEE2019

FPGA-to-CPU Undervolting Attacks

Mirjana Stojilovic, Dina Gamaleldin Ahmed Shawky Mahmoud

FPGAs are proving useful and attractive for many applications, thanks to their hardware reconfigurability, low power, and high-degree of parallelism. As a result, modern embedded systems are often based on systems-on-chip (SoCs), where CPUs and FPGAs share ...

IEEE2022

Guaranteed Yet Hard to Find: Uncovering FPGA Routing Convergence Paradox

Mirjana Stojilovic, Shashwat Shrivastava

Routing is one of the major challenges of FPGA compilation. PathFinder is a ubiquitous FPGA routing algorithm used in industry and academia due to its ability to adapt to arbitrary routing architectures and user circuits. However, to this day, we do not fu ...

IEEE2025

The Side-channel Metrics Cheat Sheet

Francesco Regazzoni, Mirjana Stojilovic, Ognjen Glamocanin

Side-channel attacks exploit a physical observable originating from a cryptographic device in order to extract its secrets. Many practically relevant advances in the field of side-channel analysis relate to security evaluations of cryptographic functions a ...

2023

Closing Leaks: Routing Against Crosstalk Side-Channel Attacks

Mirjana Stojilovic, Seyedeh Sharareh Mirzargar

This paper presents an extension to PathFinder FPGA routing algorithm, which enables it to deliver FPGA designs free from risks of crosstalk attacks. Crosstalk side-channel attacks are a real threat in large designs assembled from various IPs, where some I ...

2020