David Atienza Alonso

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Background and Objective: Cough audio signal classification is a potentially useful tool in screening for respiratory disorders, such as COVID-19. Since it is dangerous to collect data from patients with contagious diseases, many research teams have turned ...

The growing popularity of edge computing has fostered the development of diverse solutions to support Artificial Intelligence (AI) in energy-constrained devices. Nonetheless, comparatively few efforts have focused on the resiliency exhibited by AI workload ...

Dynamic thermal management (DTM) has been widely adopted to improve the energy efficiency, reliability, and performance of modern MultiProcessor SoCs (MPSoCs) on runtime. However, the evolving industry trends and heterogeneous architecture designs have int ...

Recent process technology advances trigger reliability issues that degrade the Quality-of-Service (QoS) required by embedded Systems-on-Chip (SoCs). To maintain the required QoS with acceptable overheads, we propose OCEAN, a novel cross-layer error mitigat ...

Performance and power constraints come together with Complementary Metal Oxide Semiconductor technology scaling in future Exascale systems. Technology scaling makes each individual transistor more prone to faults and, due to the exponential increase in the ...

Flow Cell Arrays (FCA) technology employs microchannels filled with an electrolytic fluid to concurrently provide cooling and power generation to integrated circuits (ICs). This solution is particularly appealing for Three-Dimensional Multi-Processor Syste ...

Today, chip multiprocessors (CMPs) that accommodate multiple processor cores on the same chip have become a reality. As the communication complexity of such multicore systems is rapidly increasing, designing an interconnect architecture with predictable be ...

This paper addresses the optimization of embedded platforms to meet the computing and real-time requirements of cyber-physical systems and IoT applications, including embedded intelligence. In this context, schedulers are vital in enhancing processor utili ...

The aim of the present invention is to propose a method to provide reliability, power management and load balancing support for multicore systems based on Networks- on-Chip (NoCs) as well as a way to efficiently implement architectural support for this met ...

Personal health monitoring systems are emerging as promising solutions to develop ultra-small, portable devices that can continuously monitor and process several vital body parameters. In this work, we present a wearable device for physical and emotional h ...

Computing servers play a key role in the development and process of emerging compute-intensive applications in recent years. However, they need to operate efficiently from an energy perspective viewpoint, while maximizing the performance and lifetime of th ...

By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with little additional o ...

Latest embedded bio-signal analysis applications, targeting low-power Wireless Body Sensor Nodes (WBSNs), present conflicting requirements. On one hand, bio-signal analysis applications are continuously increasing their demand for high computing capabiliti ...

With increasing communication demands of processor and memory cores in Systems on Chips (SoCs), scalable Networks on Chips (NoCs) are needed to interconnect the cores. For the use of NoCs to be feasible in today’s industrial designs, a custom-tailored, app ...

The ever-increasing computational complexity and energy consumption of today's applications, such as Machine Learning (ML) algorithms, not only strain the capabilities of the underlying hardware but also significantly restrict their wide deployment at the ...

Networks on Chip (NoC) has emerged as the paradigm for designing scalable communication architecture for Systems on Chips (SoCs). Avoiding the conditions that can lead to deadlocks in the network is critical for using NoCs in real designs. Methods that can ...

The increasing size of Convolutional Neural Networks (CNNs) and the high computational workload required for inference pose major challenges for their deployment on resource-constrained edge devices. In this paper, we address them by proposing a novel In-M ...

The growing need for connected, smart and energy efficient devices requires them to provide both ultra-low standby power and relatively high computing capabilities when awoken. In this context, emerging resistive memory technologies (RRAM) appear as a prom ...

This paper presents the system-level architecture of novel ultra-low power wireless body sensor nodes (WBSNs) for real-time cardiac monitoring and analysis, and discusses the main design challenges of this new generation of medical devices. In particular, ...

Recent advances in machine learning have dramatically increased model size and computational requirements, increasingly straining computing system capabilities. This tension is particularly acute for resource-constrained edge scenarios, for which careful h ...

David Atienza Alonso

Chattez avec Graph Search

A semi-supervised algorithm for improving the consistency of crowdsourced datasets: The COVID-19 case study on respiratory disorder classification

Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge

An Evaluation Framework for Dynamic Thermal Management Strategies in 3D MultiProcessor System-on-Chip Co-Design

OCEAN: An Optimized HW/SW Reliability Mitigation Approach for Scratchpad Memories in Real-Time SoCs

Predictive Reliability and Fault Management in Exascale Systems

Thermal and Power-Aware Run-Time Performance Management of 3D MPSoCs with Integrated Flow Cell Arrays

Synthesis of Predictable Networks-on-Chip Based Interconnect Architectures for Chip Multi-Processors

Dynamic Scheduling for Event-Driven Embedded Industrial Applications

Method to manage the load of peripheral elements within a multicore system

A Wearable Device For Physical and Emotional Health Monitoring

Reinforcement Learning-Based Joint Reliability and Performance Optimization for Hybrid-Cache Computing Servers

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

Hardware/Software Approach for Code Synchronization in Low-Power Multi-Core Sensor Nodes

Designing Application-Specific Networks on Chips with Floorplan Information

An Energy Efficient Soft SIMD Microarchitecture and Its Application on Quantized CNNs

Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips

Running Efficiently CNNs on the Edge Thanks to Hybrid SRAM-RRAM In-Memory Computing

RRAM-VAC: A Variability-Aware Controller for RRAM-based Memory Architectures

Ultra-Low Power Design of Wearable Cardiac Monitoring Systems

Keep All in Memory with Maxwell: a Near-SRAM Computing Architecture for Edge AI Applications