Publications associées à Die (circuit intégré)

Publications associées (25)

Towards Scalable Electronics: Synthetic 2D Materials for Large-Area 2D Circuit Integration

In the past decades, a significant increase of the transistor density on a chip has led to exponential growth in computational power driven by Moore's law. To overcome the bottleneck of traditional von-Neumann architecture in computational efficiency, effo ...

EPFL2024

Front-End Circuits for Radiation-Hard Monolithic CMOS Sensors targeting High-Energy Physics Applications

Francesco Piro

Monolithic pixel sensors integrate the sensor matrix and readout in the same silicon die, and therefore present several advantages over the more largely used hybrid detectors in high-energy physics. They offer an easier detector assembly, lower cost, lower ...

EPFL2023

Enablers for Overcurrent Capability of Silicon-Carbide-Based Power Converters: An Overview

Elison de Nazareth Matioli

With the increase in penetration of power electronic converters in the power systems, a demand for overcurrent/ overloading capability has risen for the fault clearance duration. This article gives an overview of the limiting factors and the recent technol ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023

A new versatile hybrid MEMS technology for high sensitivity, fluid proof sensing applications

Matthias Neuenschwander

The field of micro electromechanical systems (MEMS) evolved from the microelectronic industry and the technologies developed to fabricate integrated circuits. As a result, MEMS are commonly fabricated on silicon wafers. The development of MEMS has been dri ...

EPFL2022

A cryo-CMOS chip that integrates silicon quantum dots and multiplexed dispersive readout electronics

Edoardo Charbon, Andrea Ruffino, Yatao Peng

An integrated circuit fabricated using industry-standard 40 nm complementary metal-oxide-semiconductor technology can combine silicon quantum devices, digital addressing and analogue multiplexed dispersive readout electronics. ...

NATURE PORTFOLIO2022

Monolithically Integrated Catalyst-Free High Aspect Ratio InAs-on-Insulator (InAsOI) FinFETs for pH Sensing

Mihai Adrian Ionescu, Francesco Bellando, Fabien Patrick Wildhaber, Junrui Zhang, Maneesha Rupakula, Clarissa Convertino

In this work, we report a novel Indium Arsenide-on-insulator (InAsOI) FinFET platform designed with record high aspect ratio that favors the use of the devices as charge sensors. InAs has very high mobility among III-V semiconductors and an intrinsic surfa ...

2020

InAs-on-Insulator Fin Nanostructures for Integrated Computation and Sensing Functions

Maneesha Rupakula

Field-effect transistors (FETs) have established themselves as a leading platform for electrical detection of chemical and biological species. Their advantages over other optical, mechanical sensing platforms are attributed to being miniaturizable, mechani ...

EPFL2020

Monolithically integrated catalyst-free High Aspect Ratio InAs-On-Insulator (InAsOI) FinFETs for pH sensing

Mihai Adrian Ionescu, Kirsten Emilie Moselund, Francesco Bellando, Fabien Patrick Wildhaber, Junrui Zhang, Maneesha Rupakula, Clarissa Convertino

In this work, we report a novel Indium Arsenide-on-insulator (InAsOI) FinFET platform designed with record high aspect ratio that favor the use of the devices as charge sensors. InAs has very high mobility among III-V semiconductors and an intrinsic surfac ...

IEEE2019

Tri-gate technologies for high-performance power GaN devices

Jun Ma

GaN-based electronic devices have great potential for future power applications, thanks to their wide band-gap, high breakdown electric field, and high electron mobility. In addition, these devices can be integrated on large-size Si substrates and enable n ...

EPFL2019

Dopant-Induced Modifications of GaxIn(1-x)P Nanowire-Based p-n Junctions Monolithically Integrated on Si(111)

Anna Fontcuberta i Morral, Kirsten Emilie Moselund, Luca Francaviglia, Heike Riel, Nicolas Bologna

Today, silicon is the most used material in photovoltaics, with the maximum conversion efficiency getting very close to the Shockley-Queisser limit for single-junction devices. Integrating silicon with higher band-gap ternary III-V absorbers is the path to ...

2018

A low-voltage CMOS-compatible time-domain photodetector, device & front end electronics

Denis Sallin

During the last decades, the usage of silicon photodetectors, both as stand-alone sensor or integrated in arrays, grew tremendously. They are now found in almost any application and any market range, from leisure products to high-end scientific apparatuses ...

EPFL2016

3D-ICE: a Compact Thermal Model for Early-Stage Design of Liquid-Cooled ICs

David Atienza Alonso, Arvind Raj Mahankali Sridhar, Alessandro Vincenzi

Liquid-cooling using microchannel heat sinks etched on silicon dies is seen as a promising solution to the rising heat fluxes in two-dimensional and stacked three-dimensional integrated circuits. Development of such devices requires accurate and fast therm ...

Institute of Electrical and Electronics Engineers2014

Cell Transformations and Physical Design Techniques for 3D Monolithic Integrated Circuits

Giovanni De Micheli, Shashi Kanth Bobba

3D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. In 3DMI technology the 3D contacts, connecting different active layers, are in the order of few 100 nm. Given the advantage of ...

2013

High-temperature compatible 3D-integration processes for a vacuum-sealed CNT-based NEMS

Nico de Rooij, Danick Briand, Terunobu Akiyama, Rokhaya Gueye

A System-in-Package (SiP) concept for the 3D-integration of a Single Wall Carbon Nanotube (SWCNT) resonator with its CMOS driving electronics is presented. The key element of this advanced SiP is the monolithic 3D-integration of the MEMS with the CMOS elec ...

SPIE - International Society of Optical Engineering2013

Design Methodologies and CAD for Emerging Nanotechnologies

Shashi Kanth Bobba

With technology scaling reaching the fundamental limits of Si-CMOS in the near future, the semiconductor industry is in quest for innovation from various disciplines of integrated circuit (IC) design. At a fundamental level, technology forms the main drive ...

EPFL2013

Layout and Architecture Issues in Hall based CMOS microsystems

Pierre-André Farine, Pavel Kejik

The Hall cells intended for industrial applications are mainly produced in silicon integrated circuit technology. Recently, the increased use of other technologies, such as GaAs, InAs and InSb, have been reported. However, a single chip solution comprising ...

Czech Technical University in Prague, Faculty of Electrical Engineering2012

In-situ grown horizontal carbon nanotube membrane

Mihai Adrian Ionescu, Hoël Maxime Guérin

We present the successful fabrication of horizontally grown and dense carbon nanotube (CNT) membranes in situ. A TiN/Al2O3/TiN stack is first patterned to be employed as a support for the CNT growth. Iron is then evaporated with a 45 degrees tilt angle on ...

Elsevier2012

The Combined Effect of Process Variations and Power Supply Noise on Clock Skew and Jitter

Giovanni De Micheli, Vasileios Pavlidis, Hu Xu, Wayne Burleson

In modern VLSI circuits, a large number of clock buffers are inserted in clock distribution networks, which are significantly affected by process and power supply noise variations. The combined effect of process variations and power supply noise on clock s ...

Ieee2012

Test vehicle for studying thermal conductivity of die attach adhesives for high temperature electronics

Thomas Maeder, Peter Ryser, Conor Joseph Slater, Fabrizio Vecchio

Polymer adhesives offer a viable method for mounting silicon dies for high temperature applications. Here a test vehicle for comparing the thermal conductivity of different die attach materials is presented. The setup can be used to determine the degree of ...

Trans Tech Publications Ltd2012

Monolithic integration of Si nanowires with metallic electrodes: NEMS resonator and switch applications

Yusuf Leblebici, Davide Sacchetto

The challenge of wafer-scale integration of silicon nanowires into microsystems is addressed by developing a fabrication approach that utilizes a combination of Bosch-process-based nanowire fabrication with surface micromachining and chemical-mechanical-po ...

Institute of Physics2011