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Concept

Compare-and-swap

Publications associées (24)

Secure Interface Design Leveraging Hardware/Software Support

Atri Bhattacharyya

Computer systems rely heavily on abstraction to manage the exponential growth of complexity across hardware and software. Due to practical considerations of compatibility between components of these complex systems across generations, developers have favou ...

EPFL2024

A modular functional framework for the design and evaluation of multi-robot navigation

Alcherio Martinoli, Cyrill Silvan Baumann

In this work, we address the design of tightly integrated control, estimation, and allocation algorithms allowing a group of robots to move collectively. For doing so, we leverage a modular framework that allows us to define precisely the needed functional ...

Elsevier2021

Serial Lightweight Implementation Techniques for Block Ciphers

Muhammed Fatih Balli

Most of the cryptographic protocols that we use frequently on the internet are designed in a fashion that they are not necessarily suitable to run in constrained environments. Applications that run on limited-battery, with low computational power, or area ...

EPFL2021

Efficient Multi-Word Compare and Swap

Rachid Guerraoui, Mihail Igor Zablotchi

Atomic lock-free multi-word compare-and-swap (MCAS) is a powerful tool for designing concurrent algorithms. Yet, its widespread usage has been limited because lock-free implementations of MCAS make heavy use of expensive compare-and-swap (CAS) instructions ...

Schloss Dagstuhl, Leibniz-Zentrum2020

Distributed Computing with Modern Shared Memory

Mihail Igor Zablotchi

In this thesis, we revisit classic problems in shared-memory distributed computing through the lenses of (1) emerging hardware technologies and (2) changing requirements. Our contributions consist, on the one hand, in providing a better understanding of th ...

EPFL2020

OneFile: A Wait-free Persistent Transactional Memory

Nachshon Cohen

A persistent transactional memory (PTM) library provides an easy-to-use interface to programmers for using byte-addressable non-volatile memory (NVM). Previously proposed PTMs have, so far, been blocking. We present OneFile, the first wait-free PTM with in ...

IEEE COMPUTER SOC2019

Asynchronous Branch-Paralle Simulation of Detailed Neuron Models

Felix Schürmann

Simulations of electrical activity of networks of morphologically detailed neuron models allow for a better understanding of the brain. State-of-the-art simulations describe the dynamics of ionic currents and biochemical processes within branching topologi ...

2019

Brief Announcement: Persistent Multi-Word Compare-and-Swap

Matej Pavlovic

This brief announcement presents a fundamental concurrent primitive for persistent memory - a persistent atomic multi-word compare-and-swap (PMCAS). We present a novel algorithm carefully crafted to ensure that atomic updates to a multitude of words modifi ...

ASSOC COMPUTING MACHINERY2018

State Machine Replication is More Expensive than Consensus

Rachid Guerraoui, Karolos Antoniadis, Dragos-Adrian Seredinschi

Consensus and State Machine Replication (SMR) are generally considered to be equivalent problems. In certain system models, indeed, the two problems are computationally equivalent: any solution to the former problem leads to a solution to the latter, and v ...

2018

Scalable Synchronization in Shared-Memory Systems: Extrapolating, Adapting, Tuning

Georgios Chatzopoulos

As hardware evolves, so do the needs of applications. To increase the performance of an application, there exist two well-known approaches. These are scaling up an application, using a larger multi-core platform, or scaling out, by distributing work to mul ...

EPFL2018

Resistive Switching Memory Architecture Based on Polarity Controllable Selectors

Alexandre Sébastien Julien Levisse, Pierre-Emmanuel Julien Marc Gaillardon

With the continuous scaling of CMOS technology, integrating an embedded high-density non-volatile memory appears to be more and more costly and technologically challenging. Beyond floating-gate memory technologies, bipolar resistive random access memories ...

2018

The Disclosure Power of Shared Objects

Rachid Guerraoui, Mihail Igor Zablotchi, Julien Michel Stainer, Peva François Blanchard

Shared objects are the means by which processes gather and exchange information about the state of a distributed system. Objects that disclose more information about the system are therefore more desirable. In this paper, we propose the schedule reconstruc ...

2017

How CSMA/CA With Deferral Affects Performance and Dynamics in Power-Line Communications

Patrick Thiran, Julien Pierre Sacha Herzen, Christina Vlachou

Power-line communications (PLC) are becoming a key component in home networking, because they provide easy and high-throughput connectivity. The dominant MAC protocol for high data-rate PLC, the IEEE 1901, employs a CSMA/CA mechanism similar to the backoff ...

Ieee-Inst Electrical Electronics Engineers Inc2017

Fast and Robust Memory Reclamation for Concurrent Data Structures

Rachid Guerraoui, Mihail Igor Zablotchi, Oana Maria Balmau

In concurrent systems without automatic garbage collection, it is challenging to determine when it is safe to reclaim memory, especially for lock-free data structures. Existing concurrent memory reclamation schemes are either fast but do not tolerate proce ...

2016

Locking Made Easy

Rachid Guerraoui, Vasileios Trigonakis, Georgios Chatzopoulos

A priori, locking seems easy: To protect shared data from concurrent accesses, it is sufficient to lock before accessing the data and unlock after. Nevertheless, making locking efficient requires fine-tuning (a) the granularity of locks and (b) the locking ...

ACM Press2016

Measuring, Modeling and Enhancing Power-Line Communications

Christina Vlachou

Power-line communication (PLC) is a technology that has become very popular, as it offers easy and high-throughput connectivity in local networks. Although it is widely adopted in hybrid PLC/WiFi networks and commercially successful, PLC has received littl ...

EPFL2016

Economic plant-wide control design with backoff estimations using internal model control

Alejandro Gabriel Marchetti

Economic optimal operation typically involves operating as close as possible to the active constraints. However, in the presence of disturbances it is necessary to back-off from the constraints in order to avoid violating them. The backoff approach aims at ...

Elsevier Sci Ltd2016

A Thrifty Universal Construction

Rachid Guerraoui, Cheng Wang

A universal construction is an algorithm which transforms any sequential implementation of an object into a concurrent implementation of that same object in a linearizable and wait-free manner. Such constructions require underlying low-level universal shar ...

2015

Applying HTM to an OLTP System: No Free Lunch

Anastasia Ailamaki, Pinar Tözün, Danica Porobic

Transactional memory is a promising way for implementing efficient synchronization mechanisms for multicore processors. Intel's introduction of hardware transactional memory (HTM) into their Haswell line of processors marks an important step toward mainstr ...

2015

Efficient Communication and Synchronization on Manycore Processors

Darko Petrovic

The increased number of cores integrated on a chip has brought about a number of challenges. Concerns about the scalability of cache coherence protocols have urged both researchers and practitioners to explore alternative programming models, where cache co ...

EPFL2015