Babak FalsafiEnseignement et PhD Doctorant·es actuel·les Yuanlong Li, Simla Burcu Harma, Shashwat Shrivastava, Alexandros Poupakis, Shanqing Lin, Ayan Chakraborty, Pooria Poorsarvi Tehrani, Ali Ansari A dirigé les thèses EPFL de Pejman Lotfi Kamran, Sotiria Fytraki, Dejan Novakovic, Stavros Volos, Djordje Jevdjic, Ilknur Cansu Kaynak, Yusuf Onur Koçberber, Javier Picorel Obando, Alexandros Daglis, Mario Paulo Drumond Lages De Oliveira, Arash Pourhabibi Zarandi, Mark Johnathon Sutherland, Siddharth Gupta, Ognjen Glamoc
Michael Christoph GastparMichael Gastpar is a (full) Professor at EPFL. From 2003 to 2011, he was a professor at the University of California at Berkeley, earning his tenure in 2008. He received his Dipl. El.-Ing. degree from ETH Zürich, Switzerland, in 1997 and his MS degree from the University of Illinois at Urbana-Champaign, IL, USA, in 1999. He defended his doctoral thesis at EPFL on Santa Claus day, 2002. He was also a (full) Professor at Delft University of Technology, The Netherlands. His research interests are in network information theory and related coding and signal processing techniques, with applications to sensor networks and neuroscience. He is a Fellow of the IEEE. He is the co-recipient of the 2013 Communications Society & Information Theory Society Joint Paper Award. He was an Information Theory Society Distinguished Lecturer (2009-2011). He won an ERC Starting Grant in 2010, an Okawa Foundation Research Grant in 2008, an NSF CAREER award in 2004, and the 2002 EPFL Best Thesis Award. He has served as an Associate Editor for Shannon Theory for the IEEE Transactions on Information Theory (2008-11), and as Technical Program Committee Co-Chair for the 2010 International Symposium on Information Theory, Austin, TX.
Giovanni De MicheliExpertise
Technologies de conception pour les systèmes intégrés, tels que la synthèse, le codesign de HW/SW et la conception de basse puissance. Technologies de conception des systèmes sur les plateformes hétérogènes comprenant les composants électriques, et biologiques.
En savoir plus
Consulter svp http://si2.epfl.ch/~demichel/
Enseignement et PhD A dirigé les thèses EPFL de Abhishek Garg, Mohamed Haykel Ben Jamaa, Francesco Zanini, Ciprian Seiculescu, Cristina Boero, Hu Xu, Andrea Cavallini, Shashi Kanth Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
Giovanni De CesareExpertise
Simulation numérique et modélisation physique d'ouvrages et aménagements hydrauliques; sédimentation des réservoirs et courants de turbidité; gestion de l'alluvionnement des retenues; mesure des écoulements par ulstrason à effet Doppler; travaux d'aménagement fluvial et revitalisation; génie biologique; écomorphologie fluviale; écoulements transitoires rapides dans les conduite sous pression; transfer de technologie et expertise en hydraulique appliquée, constructions et infrastructures hydrauliqu
Hubert GiraultEducation: 1979 - Engineering diploma from Grenoble Institute of Technology. FRANCE. 1982 - PhD- Department of Chemistry, University of Southampton. Thesis entitled : Interfacial studies using drop image processing techniques. Positions : 1982 - 1984 SERC Research Fellow. University of Southampton. 1984 - 1985 CNRS Research Fellow. University of Southampton. 1985 - 1992 Lecturer in Physical Chemistry, University of Edinburgh. 1992 - Professor of Physical Chemistry, Ecole Polytechnique Fédérale de Lausanne. 2011 - 2014 Dean of Bachelor and Master studies Hubert Girault is the author of 2 textbooks, the co-author of about 600 scientific publications with more than 20'000 citations and the co-inventor of more than 15 patents. During his academic career, he has supervised 70 PhD students. 30 alumni of his laboratory are now Professors. Honours: Faraday medal 2006, Royal Society of Chemistry, Fellow of the International Society of Electrochemistry 2007, Reilley Award 2015. Fellow of the Electrochemical Society (USA), Shikata International medal, Polarography Society of Japan. Associate editor of Chemical Science
Pejman Lotfi KamranEnseignement et PhD Cours Advanced multiprocessor architecture CS-471 Les multiprocesseurs sont à la base des systèmes informatiques. Ce cours couvre l'architecture et l'organisation des multiprocesseurs modernes, des accélérateurs prévalents (GPU, TPU, etc.) et des datacenters. Il comprend un projet de recherche sur les multiprocesseurs et les datacenters post-Moore. Parallelism and concurrency in software CS-302 Des capteurs aux téléphones intelligents,en passant par les pl