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Concept

Gate array

Publications associées (31)

Optimization Methods for Control: From Embedded Programmable Hardware to Data-Driven Process Optimization

Harsh Ambarishkumar Shukla

The research community has been making significant progress in hardware implementation, numerical computing and algorithm development for optimization-based control. However, there are two key challenges that still have to be overcome for optimization-base ...

EPFL2021

JPEG XS-A New Standard for Visually Lossless Low-Latency Lightweight Image Coding

Touradj Ebrahimi

Joint Photographic Experts Group (JPEG) XS is a new International Standard from the JPEG Committee (formally known as ISO/International Electrotechnical Commission (IEC) JTC1/SC29/WG1). It defines an interoperable, visually lossless low-latency lightweight ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Energy-Efficient Design Techniques for High-Speed Wireline Serial Links

Firat Çelik

The exponential growth in computing power and multimedia services has caused a tremendous increase in data traffic in recent years. This increase in data traffic brings a strong demand for data bandwidth of electrical input/output (I/O) links and pushes th ...

EPFL2021

NetCracker: A Peek into the Routing Architecture of Xilinx 7-Series FPGAs

Mirjana Stojilovic, Stefan Nikolic

Novel applications have triggered significant changes at the system level of FPGA architecture design, such as the introduction of embedded VLIW processor arrays and hardened NoCs. However, the routing architecture of the soft logic fabric has largely rema ...

2021

Gate energy efficiency and negative capacitance in ferroelectric 2D/2D TFET from cryogenic to high temperatures

Mihai Adrian Ionescu, Ali Saeidi, Matteo Cavalieri, Teodor Rosca, Carlotta Gastaldi, Sadegh Kamaei Bahmaei, Luca Capua

We report the fabrication process and performance characterization of a fully integrated ferroelectric gate stack in a WSe2/SnSe2 Tunnel FETs (TFETs). The energy behavior of the gate stack during charging and discharging, together with the energy loss of a ...

NATURE PORTFOLIO2021

Miss-Optimized Memory Systems: Turning Thousands of Outstanding Misses into Reuse Opportunities

Mikhail Asiatici

Even if Dennard scaling came to an end fifteen years ago, Moore' s law kept fueling an exponential growth in compute performance through increased parallelization. However, the performance of memory and, in particular, Dynamic Random Access Memory (DRAM), ...

EPFL2021

Certification of the efficient random number generation technique based on single-photon detector arrays and time-to-digital converters

Edoardo Charbon, Samuel Burri

True random number generators (TRNGs) allow the generation of true random bit sequences, guaranteeing the unpredictability and perfect balancing of the generated values. TRNGs can be realised from the sampling of quantum phenomena, for instance, the detect ...

Wiley2021

Design and experimental validation of an FPGA-based PMU simultaneously compliant with P and M performance classes

Mario Paolone, Asja Derviskadic

Low-inertia grids are characterized by high shares of harmonic and inter-harmonic distortion, produced by the inverters that interface non-conventional generation assets to the electrical grid. These interfering tones largely compromise synchrophasor estim ...

Elsevier2020

Electromagnetic Time Reversal: Theory, Application to Fault Location in Power Networks and Experimental Validation

Zhaoyang Wang

The time-reversal invariance is readily described and universally embodied in most laws of nature, either in a strict or in a soft sense. Based on this underlying physical principle, time-reversal theory has been theoretically and experimentally studied in ...

EPFL2020

A Review of Microelectronic Systems and Circuit Techniques for Electrical Neural Recording Aimed at Closed-Loop Epilepsy Control

Alexandre Schmid, Reza Ranjandish

Closed-loop implantable electronics offer a new trend in therapeutic systems aimed at controlling some neurological diseases such as epilepsy. Seizures are detected and electrical stimulation applied to the brain or groups of nerves. To this aim, the signa ...

2020

Efficient random number generation techniques for CMOS single-photon avalanche diode array exploiting fast time tagging units

Edoardo Charbon, Samuel Burri

This work presents a technique to produce random bits by exploiting single-photon time of arrival. Two quantum random number generator (QRNG) devices based on the field programmable gate array (FPGA) technology are presented: Randy, which uses one discrete ...

AMER PHYSICAL SOC2020