Alessandro ChiesaAlessandro Chiesa is a faculty member in computer science. He conducts research in complexity theory, cryptography, and security, with a focus on the theoretical foundations and practical implementations of cryptographic proofs that are short and easy to verify. He is a co-author of several zkSNARK libraries, and is a co-inventor of the Zerocash protocol. He has co-founded Zcash and StarkWare Industries. He is a recipient of a Sloan Research Fellowship (2021), an Okawa Foundation Research Grant (2020), and Google Faculty Research Awards (2018 and 2017). He was included in MIT Technology Review's "35 Innovators Under 35" list in 2018.
Tobias KippenbergEnseignement et PhD Doctorant·es actuel·les Mengxin Lin, Xinru Ji, Shuhang Zheng, Junyin Zhang, Zhuoya Yuan, Evgenii Guzovskii, Mahdi Chegnizadeh, Jiale Sun, Shivaprasad Umesh Hulyal, Xiaoyi Cheng, Hao Li, Nikolai Kuznetsov, Alessio Zicoschi, Jiahe Pan, Mikael Sebastian Reichler, Xuxin Wang, Donato Manuel Jiménez Benetó, Xuan Yang, Hugo Paul Arbez, Amirali Arabmoheghi, Viacheslav Snigirev, Alisa Davydova, Zihan Li, Giovanni Scarioni A dirigé les thèses EPFL de Stefan Weis, Emanuel Gavartin, Xiaoqing Zhou,
Mohamad Baker DiaI am currently a data scientist and machine learning course developer at the EPFL Extension School, where I am involved in the production of online learning materials, designing and leading workshops and hackathons, and promoting the EPFL Extension School data science and digital skills to a wide audience.My interests include different aspects of machine learning, coding and information theory, signal processing, and inference on graphical models. I received the B.E. degree in Electrical and Computer Engineering and the B.A. degree in Economics with distinctions concurrently in 2012 from the American University of Beirut (AUB), Lebanon. I received the M.Sc. degree in Communication Systems in 2014 and the Ph.D. degree in Computer and Communication Sciences in 2018 both from the Swiss Federal Institute of Technology (EPFL), Switzerland.Between 2018 and 2020, I was a research scientist at the Institute for Data Science (i4DS) in the University of Applied Sciences Northwestern Switzerland (FHNW), where I worked in collaboration with the European Space Agency (ESA) on the Euclid space mission. I was a visiting researcher at Nokia Bell Labs, Germany in 2017 where I worked on the design of a novel coding scheme for the high-speed fiber optical communication systems. I was also a R&D engineer at the European Technology Center of SONY, Germany in 2014 working on the standardization of digital terrestrial TV broadcasting receivers. In 2011, I did my undergraduate internship at the University of California, Berkeley U.S.A. where I contributed to the “Mobile Millennium” traffic-monitoring project.
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
Pierre VandergheynstPierre Vandergheynst received the M.S. degree in physics and the Ph.D. degree in mathematical physics from the Université catholique de Louvain, Louvain-la-Neuve, Belgium, in 1995 and 1998, respectively. From 1998 to 2001, he was a Postdoctoral Researcher with the Signal Processing Laboratory, Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland. He was Assistant Professor at EPFL (2002-2007), where he is now a Full Professor of Electrical Engineering and, by courtesy, of Computer and Communication Sciences. As of 2015, Prof. Vandergheynst serves as EPFL’s Vice-Provost for Education. His research focuses on harmonic analysis, sparse approximations and mathematical data processing in general with applications covering signal, image and high dimensional data processing, computer vision, machine learning, data science and graph-based data processing. He was co-Editor-in-Chief of Signal Processing (2002-2006), Associate Editor of the IEEE Transactions on Signal Processing (2007-2011), the flagship journal of the signal processing community and currently serves as Associate Editor of Computer Vision and Image Understanding and SIAM Imaging Sciences. He has been on the Technical Committee of various conferences, serves on the steering committee of the SPARS workshop and was co-General Chairman of the EUSIPCO 2008 conference. Pierre Vandergheynst is the author or co-author of more than 70 journal papers, one monograph and several book chapters. He has received two IEEE best paper awards. Professor Vandergheynst is a laureate of the Apple 2007 ARTS award and of the 2009-2010 De Boelpaepe prize of the Royal Academy of Sciences of Belgium.
