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Concept

Circuit underutilization

Publications associées (32)

Toward a Full-Flexible and Fast-Prototyping TOF-PET Block Detector Based on TDC-on-FPGA

Edoardo Charbon, Esteban Venialgo Araujo

Typically, a time-of-flight (TOF) positron emission tomography (PET) block detector is built using application-specific integrated circuits (ASICs), since they integrate a high number of channels at a reasonable power consumption and into a small area. How ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

Physical Side-Channel Attacks and Covert Communication on FPGAs: A Survey

Mirjana Stojilovic, Seyedeh Sharareh Mirzargar

Field-programmable gate arrays (FPGAs) are, like CPUs, susceptible to side-channel information leakage and covert communication. The malleability of FPGAs enables users to create and control physical effects, and sense and measure the consequences. With FP ...

IEEE2019

Design and Validation of a Compact Embedded Photometric Device for Real-time Daylighting Computing in Office Buildings

Jean-Louis Scartezzini, Jérôme Henri Kämpf, Yujie Wu

Studies have shown that the exposure to daylight can have substantial visual/non-visual benefits for building occupants. To optimise daylighting provision while maintaining a comfortable visual environment, daylighting control systems have been investigate ...

2019

Plug-and-play TOF-PET Module Readout Based on TDC-on-FPGA and Gigabit Optical Fiber Network

Edoardo Charbon, Esteban Venialgo Araujo

Positron Emission Tomography (PET) scanner technology requires the use of a large number of PET detector modules that work in a parallel and synchronous manner. Moreover, system modularity is a desirable feature, that enables technology reutilization for d ...

IEEE2019

The JET upgraded toroidal Alfven Eigenmode Diagnostic System

Ambrogio Fasoli, Duccio Testa, Patrick Blanchard

The Alfven Eigenmode Active Diagnostic system (AEAD) has undergone a major upgrade and redesign to provide a state-of-the-art excitation and real-time detection system for JET. The new system consists of individual 4 kW amplifiers allowing for increased cu ...

2019

An order-statistics-inspired, fully-digital readout approach for analog SiPM arrays

Edoardo Charbon, Esteban Venialgo Araujo

In this paper we present a silicon photomultiplier (SiPM) readout system based on a field-programmable gate array (FPGA), which is capable of converting any commercial 16-channel analog SiPM array into a hybrid device with fully-digital readout for applica ...

2018

A Dynamically Reconfigurable Platform for High-Performance and Low-Power On-Board Processing

Paolo Ienne, Andrea Guerrieri, Sahand Kashani

FPGAs (Field Programmable Gate Array) are an attractive technology for high-speed data processing in space missions due to their unbeatable flexibility and best performance-to-power ratio in comparison to software. However FPGAs suffer from 3 major drawbac ...

IEEE2018

Resistive random access memory based multiplexers and field programmable gate arrays

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Gain Kim, Xifan Tang, Edouard Giacomin

Resistive random access memory (RRAM) based multiplexers and field programmable gate arrays (FPGAs) are provided. The RRAM-based multiplexers and FPGAs include a 4T1R programming structure to program the RRAMs. The programming structure includes two progra ...

2018

FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang, Edouard Giacomin

In this paper, we developed a simulation-based architecture evaluation framework for field-programmable gate arrays (FPGAs), called FPGA-SPICE, which enables automatic layout-level estimation and electrical simulations of FPGA architectures. FPGA-SPICE can ...

2018

Trading off Energy versus Accuracy in Modern Computing Systems : From Digital Circuit Design to Programming Techniques

Jérémy Lucien Maurice Schlachter

The slowdown of Moore's law, which has been the driving force of the electronics industry over the last 5 decades, is causing serious problem to Integrated Circuits (ICs) improvements. Technology scaling is becoming more and more complex and fabrication co ...

EPFL2018

LinoSPAD: A Compact Linear SPAD Camera System with 64 FPGA-Based TDC Modules for Versatile 50 ps Resolution Time-Resolved Imaging

Edoardo Charbon, Claudio Bruschini, Samuel Burri

The LinoSPAD camera system is a modular, compact and versatile time-resolved camera system, combining a linear 256 high fill factor pixel CMOS SPAD (single-photon avalanche diode) sensor with an FPGA (field-programmable gate array) and USB 3.0 transceiver ...

2017

Sequential Discrete Kalman Filter for Real-Time State Estimation in Power Distribution Systems: Theory and Implementation

Mario Paolone, Andreas Martin Kettner

This paper demonstrates the feasibility of implementing real-time state estimators for active distribution networks in field-programmable gate arrays (FPGAs) by presenting an operational prototype. The prototype is based on a linear state estimator that us ...

Institute of Electrical and Electronics Engineers2017